From 238ec4d7d4dba29c8d6d8766351d1dedf84008e0 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Thu, 4 Mar 2021 22:11:01 +0000 Subject: [PATCH] esp: add trivial implementation of the ESP_RFLAGS register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The bottom 5 bits contain the number of bytes remaining in the FIFO which is trivial to implement with Fifo8 (the remaining bits are unimplemented and left as 0 for now). Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Message-Id: <20210304221103.6369-41-mark.cave-ayland@ilande.co.uk> --- hw/scsi/esp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 34dc58da58..8a9b1500de 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -818,6 +818,10 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr) val = s->rregs[saddr]; } break; + case ESP_RFLAGS: + /* Bottom 5 bits indicate number of bytes in FIFO */ + val = fifo8_num_used(&s->fifo); + break; default: val = s->rregs[saddr]; break;