hw/acpi: add trace events for TCO watchdog register access
These tracepoints aid in understanding and debugging the guest drivers for the TCO watchdog. Reviewed-by: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20221216125749.596075-2-berrange@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -86,6 +86,7 @@ static inline int can_start_tco_timer(TCOIORegs *tr)
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static uint32_t tco_ioport_readw(TCOIORegs *tr, uint32_t addr)
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static uint32_t tco_ioport_readw(TCOIORegs *tr, uint32_t addr)
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{
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{
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uint16_t rld;
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uint16_t rld;
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uint32_t ret = 0;
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switch (addr) {
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switch (addr) {
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case TCO_RLD:
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case TCO_RLD:
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@ -96,35 +97,49 @@ static uint32_t tco_ioport_readw(TCOIORegs *tr, uint32_t addr)
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} else {
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} else {
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rld = tr->tco.rld;
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rld = tr->tco.rld;
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}
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}
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return rld;
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ret = rld;
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break;
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case TCO_DAT_IN:
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case TCO_DAT_IN:
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return tr->tco.din;
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ret = tr->tco.din;
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break;
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case TCO_DAT_OUT:
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case TCO_DAT_OUT:
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return tr->tco.dout;
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ret = tr->tco.dout;
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break;
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case TCO1_STS:
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case TCO1_STS:
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return tr->tco.sts1;
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ret = tr->tco.sts1;
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break;
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case TCO2_STS:
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case TCO2_STS:
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return tr->tco.sts2;
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ret = tr->tco.sts2;
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break;
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case TCO1_CNT:
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case TCO1_CNT:
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return tr->tco.cnt1;
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ret = tr->tco.cnt1;
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break;
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case TCO2_CNT:
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case TCO2_CNT:
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return tr->tco.cnt2;
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ret = tr->tco.cnt2;
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break;
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case TCO_MESSAGE1:
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case TCO_MESSAGE1:
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return tr->tco.msg1;
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ret = tr->tco.msg1;
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break;
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case TCO_MESSAGE2:
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case TCO_MESSAGE2:
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return tr->tco.msg2;
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ret = tr->tco.msg2;
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break;
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case TCO_WDCNT:
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case TCO_WDCNT:
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return tr->tco.wdcnt;
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ret = tr->tco.wdcnt;
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break;
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case TCO_TMR:
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case TCO_TMR:
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return tr->tco.tmr;
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ret = tr->tco.tmr;
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break;
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case SW_IRQ_GEN:
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case SW_IRQ_GEN:
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return tr->sw_irq_gen;
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ret = tr->sw_irq_gen;
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break;
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}
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}
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return 0;
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trace_tco_io_read(addr, ret);
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return ret;
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}
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}
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static void tco_ioport_writew(TCOIORegs *tr, uint32_t addr, uint32_t val)
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static void tco_ioport_writew(TCOIORegs *tr, uint32_t addr, uint32_t val)
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{
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{
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trace_tco_io_write(addr, val);
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switch (addr) {
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switch (addr) {
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case TCO_RLD:
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case TCO_RLD:
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tr->timeouts_no = 0;
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tr->timeouts_no = 0;
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@ -55,6 +55,8 @@ piix4_gpe_writeb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64
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# tco.c
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# tco.c
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tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)"
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tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)"
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tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d"
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tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d"
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tco_io_write(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
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tco_io_read(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
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# erst.c
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# erst.c
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acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%04" PRIx64 " <== 0x%016" PRIx64 " (size: %u)"
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acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%04" PRIx64 " <== 0x%016" PRIx64 " (size: %u)"
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