Hexagon (target/hexagon) Add overrides for callr
Add overrides for J2_callr J2_callrt J2_callrf Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-3-tsimpson@quicinc.com>
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@ -589,11 +589,17 @@
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#define fGEN_TCG_J2_call(SHORTCODE) \
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gen_call(ctx, riV)
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#define fGEN_TCG_J2_callr(SHORTCODE) \
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gen_callr(ctx, RsV)
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#define fGEN_TCG_J2_callt(SHORTCODE) \
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gen_cond_call(ctx, PuV, TCG_COND_EQ, riV)
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#define fGEN_TCG_J2_callf(SHORTCODE) \
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gen_cond_call(ctx, PuV, TCG_COND_NE, riV)
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#define fGEN_TCG_J2_callrt(SHORTCODE) \
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gen_cond_callr(ctx, TCG_COND_EQ, PuV, RsV)
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#define fGEN_TCG_J2_callrf(SHORTCODE) \
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gen_cond_callr(ctx, TCG_COND_NE, PuV, RsV)
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#define fGEN_TCG_J2_endloop0(SHORTCODE) \
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gen_endloop0(ctx)
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@ -682,6 +682,13 @@ static void gen_call(DisasContext *ctx, int pc_off)
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gen_write_new_pc_pcrel(ctx, pc_off, TCG_COND_ALWAYS, NULL);
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}
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static void gen_callr(DisasContext *ctx, TCGv new_pc)
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{
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TCGv next_PC = tcg_constant_tl(ctx->next_PC);
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gen_log_reg_write(HEX_REG_LR, next_PC);
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gen_write_new_pc_addr(ctx, new_pc, TCG_COND_ALWAYS, NULL);
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}
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static void gen_cond_call(DisasContext *ctx, TCGv pred,
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TCGCond cond, int pc_off)
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{
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@ -697,6 +704,17 @@ static void gen_cond_call(DisasContext *ctx, TCGv pred,
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gen_set_label(skip);
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}
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static void gen_cond_callr(DisasContext *ctx,
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TCGCond cond, TCGv pred, TCGv new_pc)
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{
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TCGv lsb = tcg_temp_new();
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TCGLabel *skip = gen_new_label();
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tcg_gen_andi_tl(lsb, pred, 1);
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tcg_gen_brcondi_tl(cond, lsb, 0, skip);
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gen_callr(ctx, new_pc);
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gen_set_label(skip);
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}
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static void gen_endloop0(DisasContext *ctx)
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{
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TCGv lpcfg = tcg_temp_new();
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@ -1,5 +1,5 @@
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/*
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* Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -415,16 +415,6 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
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#define fBRANCH(LOC, TYPE) fWRITE_NPC(LOC)
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#define fJUMPR(REGNO, TARGET, TYPE) fBRANCH(TARGET, COF_TYPE_JUMPR)
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#define fHINTJR(TARGET) { /* Not modelled in qemu */}
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#define fCALL(A) \
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do { \
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fWRITE_LR(fREAD_NPC()); \
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fBRANCH(A, COF_TYPE_CALL); \
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} while (0)
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#define fCALLR(A) \
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do { \
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fWRITE_LR(fREAD_NPC()); \
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fBRANCH(A, COF_TYPE_CALLR); \
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} while (0)
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#define fWRITE_LOOP_REGS0(START, COUNT) \
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do { \
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WRITE_RREG(HEX_REG_LC0, COUNT); \
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