target-alpha: Expand ins*l inline.
Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson
Aurelien Jarno
parent
ab471ade02
commit
248c42f393
@ -18,15 +18,11 @@ DEF_HELPER_1(ctlz, i64, i64)
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DEF_HELPER_1(cttz, i64, i64)
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DEF_HELPER_2(mskbl, i64, i64, i64)
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DEF_HELPER_2(insbl, i64, i64, i64)
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DEF_HELPER_2(mskwl, i64, i64, i64)
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DEF_HELPER_2(inswl, i64, i64, i64)
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DEF_HELPER_2(mskll, i64, i64, i64)
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DEF_HELPER_2(insll, i64, i64, i64)
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DEF_HELPER_2(zap, i64, i64, i64)
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DEF_HELPER_2(zapnot, i64, i64, i64)
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DEF_HELPER_2(mskql, i64, i64, i64)
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DEF_HELPER_2(insql, i64, i64, i64)
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DEF_HELPER_2(mskwh, i64, i64, i64)
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DEF_HELPER_2(inswh, i64, i64, i64)
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DEF_HELPER_2(msklh, i64, i64, i64)
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@ -180,34 +180,16 @@ uint64_t helper_mskbl(uint64_t val, uint64_t mask)
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return byte_zap(val, 0x01 << (mask & 7));
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}
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uint64_t helper_insbl(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0x01 << (mask & 7)));
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}
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uint64_t helper_mskwl(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, 0x03 << (mask & 7));
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}
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uint64_t helper_inswl(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0x03 << (mask & 7)));
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}
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uint64_t helper_mskll(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, 0x0F << (mask & 7));
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}
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uint64_t helper_insll(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0x0F << (mask & 7)));
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}
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uint64_t helper_zap(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, mask);
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@ -223,12 +205,6 @@ uint64_t helper_mskql(uint64_t val, uint64_t mask)
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return byte_zap(val, 0xFF << (mask & 7));
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}
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uint64_t helper_insql(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0xFF << (mask & 7)));
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}
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uint64_t helper_mskwh(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, (0x03 << (mask & 7)) >> 8);
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@ -514,36 +514,41 @@ FCMOV(cmpfge)
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FCMOV(cmpfle)
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FCMOV(cmpfgt)
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static inline uint64_t zapnot_mask(uint8_t lit)
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{
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uint64_t mask = 0;
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int i;
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for (i = 0; i < 8; ++i) {
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if ((lit >> i) & 1)
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mask |= 0xffull << (i * 8);
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}
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return mask;
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}
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/* Implement zapnot with an immediate operand, which expands to some
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form of immediate AND. This is a basic building block in the
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definition of many of the other byte manipulation instructions. */
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static inline void gen_zapnoti(int ra, int rc, uint8_t lit)
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static void gen_zapnoti(TCGv dest, TCGv src, uint8_t lit)
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{
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uint64_t mask;
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int i;
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switch (lit) {
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case 0x00:
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tcg_gen_movi_i64(cpu_ir[rc], 0);
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tcg_gen_movi_i64(dest, 0);
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break;
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case 0x01:
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tcg_gen_ext8u_i64(cpu_ir[rc], cpu_ir[ra]);
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tcg_gen_ext8u_i64(dest, src);
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break;
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case 0x03:
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tcg_gen_ext16u_i64(cpu_ir[rc], cpu_ir[ra]);
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tcg_gen_ext16u_i64(dest, src);
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break;
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case 0x0f:
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tcg_gen_ext32u_i64(cpu_ir[rc], cpu_ir[ra]);
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tcg_gen_ext32u_i64(dest, src);
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break;
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case 0xff:
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tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]);
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tcg_gen_mov_i64(dest, src);
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break;
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default:
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for (mask = i = 0; i < 8; ++i) {
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if ((lit >> i) & 1)
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mask |= 0xffull << (i * 8);
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}
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tcg_gen_andi_i64 (cpu_ir[rc], cpu_ir[ra], mask);
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tcg_gen_andi_i64 (dest, src, zapnot_mask (lit));
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break;
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}
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}
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@ -555,7 +560,7 @@ static inline void gen_zapnot(int ra, int rb, int rc, int islit, uint8_t lit)
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else if (unlikely(ra == 31))
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tcg_gen_movi_i64(cpu_ir[rc], 0);
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else if (islit)
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gen_zapnoti(ra, rc, lit);
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gen_zapnoti(cpu_ir[rc], cpu_ir[ra], lit);
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else
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gen_helper_zapnot (cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]);
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}
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@ -567,13 +572,13 @@ static inline void gen_zap(int ra, int rb, int rc, int islit, uint8_t lit)
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else if (unlikely(ra == 31))
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tcg_gen_movi_i64(cpu_ir[rc], 0);
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else if (islit)
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gen_zapnoti(ra, rc, ~lit);
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gen_zapnoti(cpu_ir[rc], cpu_ir[ra], ~lit);
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else
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gen_helper_zap (cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]);
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}
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/* EXTWH, EXTWH, EXTLH, EXTQH */
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/* EXTWH, EXTLH, EXTQH */
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static inline void gen_ext_h(int ra, int rb, int rc, int islit,
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uint8_t lit, uint8_t byte_mask)
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{
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@ -594,11 +599,11 @@ static inline void gen_ext_h(int ra, int rb, int rc, int islit,
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tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1);
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tcg_temp_free(tmp1);
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}
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gen_zapnoti(rc, rc, byte_mask);
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gen_zapnoti(cpu_ir[rc], cpu_ir[rc], byte_mask);
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}
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}
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/* EXTBL, EXTWL, EXTWL, EXTLL, EXTQL */
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/* EXTBL, EXTWL, EXTLL, EXTQL */
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static inline void gen_ext_l(int ra, int rb, int rc, int islit,
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uint8_t lit, uint8_t byte_mask)
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{
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@ -616,7 +621,37 @@ static inline void gen_ext_l(int ra, int rb, int rc, int islit,
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tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], tmp);
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tcg_temp_free(tmp);
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}
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gen_zapnoti(rc, rc, byte_mask);
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gen_zapnoti(cpu_ir[rc], cpu_ir[rc], byte_mask);
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}
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}
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/* INSBL, INSWL, INSLL, INSQL */
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static inline void gen_ins_l(int ra, int rb, int rc, int islit,
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uint8_t lit, uint8_t byte_mask)
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{
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if (unlikely(rc == 31))
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return;
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else if (unlikely(ra == 31))
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tcg_gen_movi_i64(cpu_ir[rc], 0);
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else {
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TCGv tmp = tcg_temp_new();
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/* The instruction description has us left-shift the byte mask
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the same number of byte slots as the data and apply the zap
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at the end. This is equivalent to simply performing the zap
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first and shifting afterward. */
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gen_zapnoti (tmp, cpu_ir[ra], byte_mask);
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if (islit) {
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tcg_gen_shli_i64(cpu_ir[rc], tmp, (lit & 7) * 8);
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} else {
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TCGv shift = tcg_temp_new();
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tcg_gen_andi_i64(shift, cpu_ir[rb], 7);
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tcg_gen_shli_i64(shift, shift, 3);
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tcg_gen_shl_i64(cpu_ir[rc], tmp, shift);
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tcg_temp_free(shift);
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}
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tcg_temp_free(tmp);
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}
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}
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@ -652,13 +687,9 @@ ARITH3(sublv)
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ARITH3(addqv)
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ARITH3(subqv)
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ARITH3(mskbl)
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ARITH3(insbl)
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ARITH3(mskwl)
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ARITH3(inswl)
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ARITH3(mskll)
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ARITH3(insll)
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ARITH3(mskql)
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ARITH3(insql)
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ARITH3(mskwh)
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ARITH3(inswh)
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ARITH3(msklh)
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@ -1291,7 +1322,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
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break;
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case 0x0B:
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/* INSBL */
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gen_insbl(ra, rb, rc, islit, lit);
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gen_ins_l(ra, rb, rc, islit, lit, 0x01);
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break;
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case 0x12:
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/* MSKWL */
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@ -1303,7 +1334,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
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break;
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case 0x1B:
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/* INSWL */
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gen_inswl(ra, rb, rc, islit, lit);
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gen_ins_l(ra, rb, rc, islit, lit, 0x03);
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break;
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case 0x22:
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/* MSKLL */
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@ -1315,7 +1346,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
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break;
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case 0x2B:
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/* INSLL */
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gen_insll(ra, rb, rc, islit, lit);
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gen_ins_l(ra, rb, rc, islit, lit, 0x0f);
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break;
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case 0x30:
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/* ZAP */
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@ -1367,7 +1398,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
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break;
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case 0x3B:
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/* INSQL */
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gen_insql(ra, rb, rc, islit, lit);
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gen_ins_l(ra, rb, rc, islit, lit, 0xff);
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break;
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case 0x3C:
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/* SRA */
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