target-ppc: Add float register read/write using XML
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6423 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -9272,6 +9272,33 @@ static void dump_ppc_insns (CPUPPCState *env)
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}
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#endif
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static int gdb_get_float_reg(CPUState *env, uint8_t *mem_buf, int n)
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{
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if (n < 32) {
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stfq_p(mem_buf, env->fpr[n]);
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return 8;
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}
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if (n == 32) {
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/* FPSCR not implemented */
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memset(mem_buf, 0, 4);
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return 4;
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}
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return 0;
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}
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static int gdb_set_float_reg(CPUState *env, uint8_t *mem_buf, int n)
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{
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if (n < 32) {
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env->fpr[n] = ldfq_p(mem_buf);
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return 8;
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}
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if (n == 32) {
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/* FPSCR not implemented */
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return 4;
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}
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return 0;
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}
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int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
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{
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env->msr_mask = def->msr_mask;
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@ -9284,6 +9311,11 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
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if (create_ppc_opcodes(env, def) < 0)
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return -1;
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init_ppc_proc(env, def);
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if (def->insns_flags & PPC_FLOAT) {
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gdb_register_coprocessor(env, gdb_get_float_reg, gdb_set_float_reg,
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33, "power-fpu.xml", 0);
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}
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#if defined(PPC_DUMP_CPU)
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{
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const char *mmu_model, *excp_model, *bus_model;
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