linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL

These prctl set the Streaming SVE vector length, which may
be completely different from the Normal SVE vector length.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220708151540.18136-43-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-07-08 20:45:37 +05:30 committed by Peter Maydell
parent fd72f5d0ba
commit 24d87c187c
2 changed files with 70 additions and 0 deletions

View File

@ -10,6 +10,7 @@ static abi_long do_prctl_sve_get_vl(CPUArchState *env)
{
ARMCPU *cpu = env_archcpu(env);
if (cpu_isar_feature(aa64_sve, cpu)) {
/* PSTATE.SM is always unset on syscall entry. */
return sve_vq(env) * 16;
}
return -TARGET_EINVAL;
@ -27,6 +28,7 @@ static abi_long do_prctl_sve_set_vl(CPUArchState *env, abi_long arg2)
&& arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
uint32_t vq, old_vq;
/* PSTATE.SM is always unset on syscall entry. */
old_vq = sve_vq(env);
/*
@ -49,6 +51,58 @@ static abi_long do_prctl_sve_set_vl(CPUArchState *env, abi_long arg2)
}
#define do_prctl_sve_set_vl do_prctl_sve_set_vl
static abi_long do_prctl_sme_get_vl(CPUArchState *env)
{
ARMCPU *cpu = env_archcpu(env);
if (cpu_isar_feature(aa64_sme, cpu)) {
return sme_vq(env) * 16;
}
return -TARGET_EINVAL;
}
#define do_prctl_sme_get_vl do_prctl_sme_get_vl
static abi_long do_prctl_sme_set_vl(CPUArchState *env, abi_long arg2)
{
/*
* We cannot support either PR_SME_SET_VL_ONEXEC or PR_SME_VL_INHERIT.
* Note the kernel definition of sve_vl_valid allows for VQ=512,
* i.e. VL=8192, even though the architectural maximum is VQ=16.
*/
if (cpu_isar_feature(aa64_sme, env_archcpu(env))
&& arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
int vq, old_vq;
old_vq = sme_vq(env);
/*
* Bound the value of vq, so that we know that it fits into
* the 4-bit field in SMCR_EL1. Because PSTATE.SM is cleared
* on syscall entry, we are not modifying the current SVE
* vector length.
*/
vq = MAX(arg2 / 16, 1);
vq = MIN(vq, 16);
env->vfp.smcr_el[1] =
FIELD_DP64(env->vfp.smcr_el[1], SMCR, LEN, vq - 1);
/* Delay rebuilding hflags until we know if ZA must change. */
vq = sve_vqm1_for_el_sm(env, 0, true) + 1;
if (vq != old_vq) {
/*
* PSTATE.ZA state is cleared on any change to SVL.
* We need not call arm_rebuild_hflags because PSTATE.SM was
* cleared on syscall entry, so this hasn't changed VL.
*/
env->svcr = FIELD_DP64(env->svcr, SVCR, ZA, 0);
arm_rebuild_hflags(env);
}
return vq * 16;
}
return -TARGET_EINVAL;
}
#define do_prctl_sme_set_vl do_prctl_sme_set_vl
static abi_long do_prctl_reset_keys(CPUArchState *env, abi_long arg2)
{
ARMCPU *cpu = env_archcpu(env);

View File

@ -6343,6 +6343,12 @@ abi_long do_arch_prctl(CPUX86State *env, int code, abi_ulong addr)
#ifndef PR_SET_SYSCALL_USER_DISPATCH
# define PR_SET_SYSCALL_USER_DISPATCH 59
#endif
#ifndef PR_SME_SET_VL
# define PR_SME_SET_VL 63
# define PR_SME_GET_VL 64
# define PR_SME_VL_LEN_MASK 0xffff
# define PR_SME_VL_INHERIT (1 << 17)
#endif
#include "target_prctl.h"
@ -6383,6 +6389,12 @@ static abi_long do_prctl_inval1(CPUArchState *env, abi_long arg2)
#ifndef do_prctl_set_unalign
#define do_prctl_set_unalign do_prctl_inval1
#endif
#ifndef do_prctl_sme_get_vl
#define do_prctl_sme_get_vl do_prctl_inval0
#endif
#ifndef do_prctl_sme_set_vl
#define do_prctl_sme_set_vl do_prctl_inval1
#endif
static abi_long do_prctl(CPUArchState *env, abi_long option, abi_long arg2,
abi_long arg3, abi_long arg4, abi_long arg5)
@ -6434,6 +6446,10 @@ static abi_long do_prctl(CPUArchState *env, abi_long option, abi_long arg2,
return do_prctl_sve_get_vl(env);
case PR_SVE_SET_VL:
return do_prctl_sve_set_vl(env, arg2);
case PR_SME_GET_VL:
return do_prctl_sme_get_vl(env);
case PR_SME_SET_VL:
return do_prctl_sme_set_vl(env, arg2);
case PR_PAC_RESET_KEYS:
if (arg3 || arg4 || arg5) {
return -TARGET_EINVAL;