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target/ppc: Use tcg_gen_negsetcond_*

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Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-08-05 00:22:26 +00:00
parent cfe158875b
commit 253d110dba
2 changed files with 7 additions and 7 deletions
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6
target/ppc/translate/fixedpoint-impl.c.inc
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@ -342,12 +342,14 @@ static bool do_set_bool_cond(DisasContext *ctx, arg_X_bi *a, bool neg, bool rev)
uint32_t mask = 0x08 >> (a->bi & 0x03);
TCGCond cond = rev ? TCG_COND_EQ : TCG_COND_NE;
TCGv temp = tcg_temp_new();
TCGv zero = tcg_constant_tl(0);
tcg_gen_extu_i32_tl(temp, cpu_crf[a->bi >> 2]);
tcg_gen_andi_tl(temp, temp, mask);
tcg_gen_setcondi_tl(cond, cpu_gpr[a->rt], temp, 0);
if (neg) {
tcg_gen_neg_tl(cpu_gpr[a->rt], cpu_gpr[a->rt]);
tcg_gen_negsetcond_tl(cond, cpu_gpr[a->rt], temp, zero);
} else {
tcg_gen_setcond_tl(cond, cpu_gpr[a->rt], temp, zero);
}
return true;
}

8
target/ppc/translate/vmx-impl.c.inc
View File

@ -1341,8 +1341,7 @@ static bool trans_VCMPEQUQ(DisasContext *ctx, arg_VC *a)
tcg_gen_xor_i64(t1, t0, t1);
tcg_gen_or_i64(t1, t1, t2);
tcg_gen_setcondi_i64(TCG_COND_EQ, t1, t1, 0);
tcg_gen_neg_i64(t1, t1);
tcg_gen_negsetcond_i64(TCG_COND_EQ, t1, t1, tcg_constant_i64(0));
set_avr64(a->vrt, t1, true);
set_avr64(a->vrt, t1, false);
@ -1365,15 +1364,14 @@ static bool do_vcmpgtq(DisasContext *ctx, arg_VC *a, bool sign)
get_avr64(t0, a->vra, false);
get_avr64(t1, a->vrb, false);
tcg_gen_setcond_i64(TCG_COND_GTU, t2, t0, t1);
tcg_gen_negsetcond_i64(TCG_COND_GTU, t2, t0, t1);
get_avr64(t0, a->vra, true);
get_avr64(t1, a->vrb, true);
tcg_gen_movcond_i64(TCG_COND_EQ, t2, t0, t1, t2, tcg_constant_i64(0));
tcg_gen_setcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1);
tcg_gen_negsetcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1);
tcg_gen_or_i64(t1, t1, t2);
tcg_gen_neg_i64(t1, t1);
set_avr64(a->vrt, t1, true);
set_avr64(a->vrt, t1, false);