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Sparc32: convert slavio_misc to qdev

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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-07-13 16:51:27 +00:00
parent 325f27475d
commit 2582cfa0cb
3 changed files with 147 additions and 65 deletions
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187
hw/slavio_misc.c
View File

@ -21,9 +21,10 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE. * THE SOFTWARE.
*/ */
#include "hw.h"
#include "sun4m.h" #include "sun4m.h"
#include "sysemu.h" #include "sysemu.h"
#include "sysbus.h"
/* debug misc */ /* debug misc */
//#define DEBUG_MISC //#define DEBUG_MISC
@ -44,16 +45,21 @@
#endif #endif
typedef struct MiscState { typedef struct MiscState {
SysBusDevice busdev;
qemu_irq irq; qemu_irq irq;
uint8_t config; uint8_t config;
uint8_t aux1, aux2; uint8_t aux1, aux2;
uint8_t diag, mctrl; uint8_t diag, mctrl;
uint32_t sysctrl; uint32_t sysctrl;
uint16_t leds; uint16_t leds;
qemu_irq cpu_halt;
qemu_irq fdc_tc; qemu_irq fdc_tc;
} MiscState; } MiscState;
typedef struct APCState {
SysBusDevice busdev;
qemu_irq cpu_halt;
} APCState;
#define MISC_SIZE 1 #define MISC_SIZE 1
#define SYSCTRL_SIZE 4 #define SYSCTRL_SIZE 4
@ -283,7 +289,7 @@ static CPUWriteMemoryFunc *slavio_aux2_mem_write[3] = {
static void apc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) static void apc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{ {
MiscState *s = opaque; APCState *s = opaque;
MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); MISC_DPRINTF("Write power management %2.2x\n", val & 0xff);
qemu_irq_raise(s->cpu_halt); qemu_irq_raise(s->cpu_halt);
@ -434,75 +440,148 @@ static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
return 0; return 0;
} }
void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, void *slavio_misc_init(target_phys_addr_t base,
target_phys_addr_t aux1_base, target_phys_addr_t aux1_base,
target_phys_addr_t aux2_base, qemu_irq irq, target_phys_addr_t aux2_base, qemu_irq irq,
qemu_irq cpu_halt, qemu_irq **fdc_tc) qemu_irq fdc_tc)
{ {
int io; DeviceState *dev;
MiscState *s; SysBusDevice *s;
MiscState *d;
s = qemu_mallocz(sizeof(MiscState));
dev = qdev_create(NULL, "slavio_misc");
qdev_init(dev);
s = sysbus_from_qdev(dev);
if (base) { if (base) {
/* 8 bit registers */ /* 8 bit registers */
/* Slavio control */
// Slavio control sysbus_mmio_map(s, 0, base + MISC_CFG);
io = cpu_register_io_memory(slavio_cfg_mem_read, /* Diagnostics */
slavio_cfg_mem_write, s); sysbus_mmio_map(s, 1, base + MISC_DIAG);
cpu_register_physical_memory(base + MISC_CFG, MISC_SIZE, io); /* Modem control */
sysbus_mmio_map(s, 2, base + MISC_MDM);
// Diagnostics
io = cpu_register_io_memory(slavio_diag_mem_read,
slavio_diag_mem_write, s);
cpu_register_physical_memory(base + MISC_DIAG, MISC_SIZE, io);
// Modem control
io = cpu_register_io_memory(slavio_mdm_mem_read,
slavio_mdm_mem_write, s);
cpu_register_physical_memory(base + MISC_MDM, MISC_SIZE, io);
/* 16 bit registers */ /* 16 bit registers */
io = cpu_register_io_memory(slavio_led_mem_read,
slavio_led_mem_write, s);
/* ss600mp diag LEDs */ /* ss600mp diag LEDs */
cpu_register_physical_memory(base + MISC_LEDS, MISC_SIZE, io); sysbus_mmio_map(s, 3, base + MISC_LEDS);
/* 32 bit registers */ /* 32 bit registers */
io = cpu_register_io_memory(slavio_sysctrl_mem_read, /* System control */
slavio_sysctrl_mem_write, s); sysbus_mmio_map(s, 4, base + MISC_SYS);
// System control
cpu_register_physical_memory(base + MISC_SYS, SYSCTRL_SIZE, io);
} }
// AUX 1 (Misc System Functions)
if (aux1_base) { if (aux1_base) {
io = cpu_register_io_memory(slavio_aux1_mem_read, /* AUX 1 (Misc System Functions) */
slavio_aux1_mem_write, s); sysbus_mmio_map(s, 5, aux1_base);
cpu_register_physical_memory(aux1_base, MISC_SIZE, io);
} }
// AUX 2 (Software Powerdown Control)
if (aux2_base) { if (aux2_base) {
io = cpu_register_io_memory(slavio_aux2_mem_read, /* AUX 2 (Software Powerdown Control) */
slavio_aux2_mem_write, s); sysbus_mmio_map(s, 6, aux2_base);
cpu_register_physical_memory(aux2_base, MISC_SIZE, io);
} }
sysbus_connect_irq(s, 0, irq);
sysbus_connect_irq(s, 1, fdc_tc);
// Power management (APC) XXX: not a Slavio device d = FROM_SYSBUS(MiscState, s);
if (power_base) {
io = cpu_register_io_memory(apc_mem_read, apc_mem_write, s);
cpu_register_physical_memory(power_base, MISC_SIZE, io);
}
s->irq = irq; return d;
s->cpu_halt = cpu_halt; }
*fdc_tc = &s->fdc_tc;
register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load, static void apc_init1(SysBusDevice *dev)
{
APCState *s = FROM_SYSBUS(APCState, dev);
int io;
sysbus_init_irq(dev, &s->cpu_halt);
/* Power management (APC) XXX: not a Slavio device */
io = cpu_register_io_memory(apc_mem_read, apc_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
}
void apc_init(target_phys_addr_t power_base, qemu_irq cpu_halt)
{
DeviceState *dev;
SysBusDevice *s;
dev = qdev_create(NULL, "apc");
qdev_init(dev);
s = sysbus_from_qdev(dev);
/* Power management (APC) XXX: not a Slavio device */
sysbus_mmio_map(s, 0, power_base);
sysbus_connect_irq(s, 0, cpu_halt);
}
static void slavio_misc_init1(SysBusDevice *dev)
{
MiscState *s = FROM_SYSBUS(MiscState, dev);
int io;
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->fdc_tc);
/* 8 bit registers */
/* Slavio control */
io = cpu_register_io_memory(slavio_cfg_mem_read,
slavio_cfg_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
/* Diagnostics */
io = cpu_register_io_memory(slavio_diag_mem_read,
slavio_diag_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
/* Modem control */
io = cpu_register_io_memory(slavio_mdm_mem_read,
slavio_mdm_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
/* 16 bit registers */
/* ss600mp diag LEDs */
io = cpu_register_io_memory(slavio_led_mem_read,
slavio_led_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
/* 32 bit registers */
/* System control */
io = cpu_register_io_memory(slavio_sysctrl_mem_read,
slavio_sysctrl_mem_write, s);
sysbus_init_mmio(dev, SYSCTRL_SIZE, io);
/* AUX 1 (Misc System Functions) */
io = cpu_register_io_memory(slavio_aux1_mem_read,
slavio_aux1_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
/* AUX 2 (Software Powerdown Control) */
io = cpu_register_io_memory(slavio_aux2_mem_read,
slavio_aux2_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
register_savevm("slavio_misc", -1, 1, slavio_misc_save, slavio_misc_load,
s); s);
qemu_register_reset(slavio_misc_reset, s); qemu_register_reset(slavio_misc_reset, s);
slavio_misc_reset(s); slavio_misc_reset(s);
return s;
} }
static SysBusDeviceInfo slavio_misc_info = {
.init = slavio_misc_init1,
.qdev.name = "slavio_misc",
.qdev.size = sizeof(MiscState),
.qdev.props = (DevicePropList[]) {
{.name = NULL}
}
};
static SysBusDeviceInfo apc_info = {
.init = apc_init1,
.qdev.name = "apc",
.qdev.size = sizeof(MiscState),
.qdev.props = (DevicePropList[]) {
{.name = NULL}
}
};
static void slavio_misc_register_devices(void)
{
sysbus_register_withprop(&slavio_misc_info);
sysbus_register_withprop(&apc_info);
}
device_init(slavio_misc_register_devices)

20
hw/sun4m.c
View File

@ -435,7 +435,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq, qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq,
*espdma_irq, *ledma_irq; *espdma_irq, *ledma_irq;
qemu_irq *esp_reset, *le_reset; qemu_irq *esp_reset, *le_reset;
qemu_irq *fdc_tc; qemu_irq fdc_tc;
qemu_irq *cpu_halt; qemu_irq *cpu_halt;
ram_addr_t ram_offset, prom_offset; ram_addr_t ram_offset, prom_offset;
unsigned long kernel_size; unsigned long kernel_size;
@ -553,10 +553,12 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
serial_hds[0], serial_hds[1], ESCC_CLOCK, 1); serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1); cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1);
slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base, slavio_misc = slavio_misc_init(hwdef->slavio_base,
hwdef->aux1_base, hwdef->aux2_base, hwdef->aux1_base, hwdef->aux2_base,
slavio_irq[hwdef->me_irq], cpu_halt[0], slavio_irq[hwdef->me_irq], fdc_tc);
&fdc_tc); if (hwdef->apc_base) {
apc_init(hwdef->apc_base, cpu_halt[0]);
}
if (hwdef->fd_base) { if (hwdef->fd_base) {
/* there is zero or one floppy drive */ /* there is zero or one floppy drive */
@ -566,7 +568,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
fd[0] = drives_table[drive_index].bdrv; fd[0] = drives_table[drive_index].bdrv;
sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
fdc_tc); &fdc_tc);
} }
if (drive_get_max_bus(IF_SCSI) > 0) { if (drive_get_max_bus(IF_SCSI) > 0) {
@ -1443,7 +1445,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
void *iommu, *espdma, *ledma, *nvram; void *iommu, *espdma, *ledma, *nvram;
qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq; qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
qemu_irq *esp_reset, *le_reset; qemu_irq *esp_reset, *le_reset;
qemu_irq *fdc_tc; qemu_irq fdc_tc;
ram_addr_t ram_offset, prom_offset; ram_addr_t ram_offset, prom_offset;
unsigned long kernel_size; unsigned long kernel_size;
int ret; int ret;
@ -1539,8 +1541,8 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
slavio_irq[hwdef->ser_irq], serial_hds[0], serial_hds[1], slavio_irq[hwdef->ser_irq], serial_hds[0], serial_hds[1],
ESCC_CLOCK, 1); ESCC_CLOCK, 1);
slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0, slavio_misc = slavio_misc_init(0, hwdef->aux1_base, 0,
slavio_irq[hwdef->me_irq], NULL, &fdc_tc); slavio_irq[hwdef->me_irq], fdc_tc);
if (hwdef->fd_base != (target_phys_addr_t)-1) { if (hwdef->fd_base != (target_phys_addr_t)-1) {
/* there is zero or one floppy drive */ /* there is zero or one floppy drive */
@ -1550,7 +1552,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
fd[0] = drives_table[drive_index].bdrv; fd[0] = drives_table[drive_index].bdrv;
sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
fdc_tc); &fdc_tc);
} }
if (drive_get_max_bus(IF_SCSI) > 0) { if (drive_get_max_bus(IF_SCSI) > 0) {

5
hw/sun4m.h
View File

@ -50,11 +50,12 @@ void slavio_timer_init_all(target_phys_addr_t base, qemu_irq master_irq,
qemu_irq *cpu_irqs, unsigned int num_cpus); qemu_irq *cpu_irqs, unsigned int num_cpus);
/* slavio_misc.c */ /* slavio_misc.c */
void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, void *slavio_misc_init(target_phys_addr_t base,
target_phys_addr_t aux1_base, target_phys_addr_t aux1_base,
target_phys_addr_t aux2_base, qemu_irq irq, target_phys_addr_t aux2_base, qemu_irq irq,
qemu_irq cpu_halt, qemu_irq **fdc_tc); qemu_irq fdc_tc);
void slavio_set_power_fail(void *opaque, int power_failing); void slavio_set_power_fail(void *opaque, int power_failing);
void apc_init(target_phys_addr_t power_base, qemu_irq cpu_halt);
/* cs4231.c */ /* cs4231.c */
void cs_init(target_phys_addr_t base, int irq, void *intctl); void cs_init(target_phys_addr_t base, int irq, void *intctl);