lm32: add Milkymist AC97 support
This patch adds support for the Milkymist AC97 compatible sound output and input core. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Michael Walle
Edgar E. Iglesias
parent
449aa4a491
commit
25a8bb96f4
@ -267,6 +267,7 @@ obj-lm32-y += lm32_juart.o
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obj-lm32-y += lm32_timer.o
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obj-lm32-y += lm32_uart.o
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obj-lm32-y += lm32_sys.o
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obj-lm32-y += milkymist-ac97.o
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obj-mips-y = mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o
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obj-mips-y += mips_addr.o mips_timer.o mips_int.o
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3
configure
vendored
3
configure
vendored
@ -3350,6 +3350,9 @@ if test "$target_softmmu" = "yes" ; then
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arm)
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cflags="-DHAS_AUDIO $cflags"
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;;
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lm32)
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cflags="-DHAS_AUDIO $cflags"
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;;
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i386|mips|ppc)
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cflags="-DHAS_AUDIO -DHAS_AUDIO_CHOICE $cflags"
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;;
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335
hw/milkymist-ac97.c
Normal file
335
hw/milkymist-ac97.c
Normal file
@ -0,0 +1,335 @@
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/*
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* QEMU model of the Milkymist System Controller.
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*
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* Copyright (c) 2010 Michael Walle <michael@walle.cc>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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*
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* Specification available at:
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* http://www.milkymist.org/socdoc/ac97.pdf
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*/
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#include "hw.h"
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#include "sysbus.h"
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#include "trace.h"
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#include "audio/audio.h"
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#include "qemu-error.h"
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enum {
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R_AC97_CTRL = 0,
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R_AC97_ADDR,
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R_AC97_DATAOUT,
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R_AC97_DATAIN,
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R_D_CTRL,
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R_D_ADDR,
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R_D_REMAINING,
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R_RESERVED,
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R_U_CTRL,
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R_U_ADDR,
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R_U_REMAINING,
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R_MAX
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};
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enum {
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AC97_CTRL_RQEN = (1<<0),
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AC97_CTRL_WRITE = (1<<1),
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};
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enum {
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CTRL_EN = (1<<0),
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};
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struct MilkymistAC97State {
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SysBusDevice busdev;
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QEMUSoundCard card;
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SWVoiceIn *voice_in;
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SWVoiceOut *voice_out;
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uint32_t regs[R_MAX];
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qemu_irq crrequest_irq;
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qemu_irq crreply_irq;
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qemu_irq dmar_irq;
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qemu_irq dmaw_irq;
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};
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typedef struct MilkymistAC97State MilkymistAC97State;
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static void update_voices(MilkymistAC97State *s)
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{
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if (s->regs[R_D_CTRL] & CTRL_EN) {
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AUD_set_active_out(s->voice_out, 1);
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} else {
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AUD_set_active_out(s->voice_out, 0);
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}
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if (s->regs[R_U_CTRL] & CTRL_EN) {
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AUD_set_active_in(s->voice_in, 1);
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} else {
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AUD_set_active_in(s->voice_in, 0);
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}
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}
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static uint32_t ac97_read(void *opaque, target_phys_addr_t addr)
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{
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MilkymistAC97State *s = opaque;
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uint32_t r = 0;
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addr >>= 2;
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switch (addr) {
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case R_AC97_CTRL:
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case R_AC97_ADDR:
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case R_AC97_DATAOUT:
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case R_AC97_DATAIN:
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case R_D_CTRL:
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case R_D_ADDR:
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case R_D_REMAINING:
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case R_U_CTRL:
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case R_U_ADDR:
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case R_U_REMAINING:
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r = s->regs[addr];
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break;
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default:
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error_report("milkymist_ac97: read access to unkown register 0x"
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TARGET_FMT_plx, addr << 2);
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break;
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}
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trace_milkymist_ac97_memory_read(addr << 2, r);
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return r;
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}
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static void ac97_write(void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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MilkymistAC97State *s = opaque;
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trace_milkymist_ac97_memory_write(addr, value);
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addr >>= 2;
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switch (addr) {
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case R_AC97_CTRL:
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/* always raise an IRQ according to the direction */
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if (value & AC97_CTRL_RQEN) {
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if (value & AC97_CTRL_WRITE) {
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trace_milkymist_ac97_pulse_irq_crrequest();
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qemu_irq_pulse(s->crrequest_irq);
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} else {
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trace_milkymist_ac97_pulse_irq_crreply();
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qemu_irq_pulse(s->crreply_irq);
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}
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}
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/* RQEN is self clearing */
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s->regs[addr] = value & ~AC97_CTRL_RQEN;
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break;
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case R_D_CTRL:
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case R_U_CTRL:
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s->regs[addr] = value;
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update_voices(s);
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break;
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case R_AC97_ADDR:
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case R_AC97_DATAOUT:
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case R_AC97_DATAIN:
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case R_D_ADDR:
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case R_D_REMAINING:
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case R_U_ADDR:
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case R_U_REMAINING:
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s->regs[addr] = value;
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break;
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default:
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error_report("milkymist_ac97: write access to unkown register 0x"
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TARGET_FMT_plx, addr);
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break;
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}
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}
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static CPUReadMemoryFunc * const ac97_read_fn[] = {
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NULL,
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NULL,
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&ac97_read,
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};
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static CPUWriteMemoryFunc * const ac97_write_fn[] = {
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NULL,
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NULL,
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&ac97_write,
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};
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static void ac97_in_cb(void *opaque, int avail_b)
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{
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MilkymistAC97State *s = opaque;
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uint8_t buf[4096];
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uint32_t remaining = s->regs[R_U_REMAINING];
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int temp = audio_MIN(remaining, avail_b);
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uint32_t addr = s->regs[R_U_ADDR];
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int transferred = 0;
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trace_milkymist_ac97_in_cb(avail_b, remaining);
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/* prevent from raising an IRQ */
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if (temp == 0) {
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return;
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}
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while (temp) {
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int acquired, to_copy;
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to_copy = audio_MIN(temp, sizeof(buf));
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acquired = AUD_read(s->voice_in, buf, to_copy);
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if (!acquired) {
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break;
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}
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cpu_physical_memory_write(addr, buf, acquired);
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temp -= acquired;
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addr += acquired;
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transferred += acquired;
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}
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trace_milkymist_ac97_in_cb_transferred(transferred);
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s->regs[R_U_ADDR] = addr;
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s->regs[R_U_REMAINING] -= transferred;
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if ((s->regs[R_U_CTRL] & CTRL_EN) && (s->regs[R_U_REMAINING] == 0)) {
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trace_milkymist_ac97_pulse_irq_dmaw();
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qemu_irq_pulse(s->dmaw_irq);
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}
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}
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static void ac97_out_cb(void *opaque, int free_b)
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{
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MilkymistAC97State *s = opaque;
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uint8_t buf[4096];
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uint32_t remaining = s->regs[R_D_REMAINING];
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int temp = audio_MIN(remaining, free_b);
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uint32_t addr = s->regs[R_D_ADDR];
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int transferred = 0;
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trace_milkymist_ac97_out_cb(free_b, remaining);
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/* prevent from raising an IRQ */
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if (temp == 0) {
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return;
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}
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while (temp) {
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int copied, to_copy;
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to_copy = audio_MIN(temp, sizeof(buf));
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cpu_physical_memory_read(addr, buf, to_copy);
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copied = AUD_write(s->voice_out, buf, to_copy);
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if (!copied) {
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break;
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}
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temp -= copied;
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addr += copied;
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transferred += copied;
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}
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trace_milkymist_ac97_out_cb_transferred(transferred);
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s->regs[R_D_ADDR] = addr;
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s->regs[R_D_REMAINING] -= transferred;
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if ((s->regs[R_D_CTRL] & CTRL_EN) && (s->regs[R_D_REMAINING] == 0)) {
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trace_milkymist_ac97_pulse_irq_dmar();
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qemu_irq_pulse(s->dmar_irq);
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}
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}
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static void milkymist_ac97_reset(DeviceState *d)
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{
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MilkymistAC97State *s = container_of(d, MilkymistAC97State, busdev.qdev);
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int i;
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for (i = 0; i < R_MAX; i++) {
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s->regs[i] = 0;
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}
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AUD_set_active_in(s->voice_in, 0);
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AUD_set_active_out(s->voice_out, 0);
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}
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static int ac97_post_load(void *opaque, int version_id)
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{
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MilkymistAC97State *s = opaque;
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update_voices(s);
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return 0;
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}
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static int milkymist_ac97_init(SysBusDevice *dev)
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{
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MilkymistAC97State *s = FROM_SYSBUS(typeof(*s), dev);
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int ac97_regs;
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struct audsettings as;
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sysbus_init_irq(dev, &s->crrequest_irq);
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sysbus_init_irq(dev, &s->crreply_irq);
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sysbus_init_irq(dev, &s->dmar_irq);
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sysbus_init_irq(dev, &s->dmaw_irq);
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AUD_register_card("Milkymist AC'97", &s->card);
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as.freq = 48000;
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as.nchannels = 2;
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as.fmt = AUD_FMT_S16;
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as.endianness = 1;
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s->voice_in = AUD_open_in(&s->card, s->voice_in,
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"mm_ac97.in", s, ac97_in_cb, &as);
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s->voice_out = AUD_open_out(&s->card, s->voice_out,
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"mm_ac97.out", s, ac97_out_cb, &as);
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ac97_regs = cpu_register_io_memory(ac97_read_fn, ac97_write_fn, s,
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DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio(dev, R_MAX * 4, ac97_regs);
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return 0;
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}
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static const VMStateDescription vmstate_milkymist_ac97 = {
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.name = "milkymist-ac97",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.post_load = ac97_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(regs, MilkymistAC97State, R_MAX),
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VMSTATE_END_OF_LIST()
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}
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};
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static SysBusDeviceInfo milkymist_ac97_info = {
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.init = milkymist_ac97_init,
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.qdev.name = "milkymist-ac97",
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.qdev.size = sizeof(MilkymistAC97State),
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.qdev.vmsd = &vmstate_milkymist_ac97,
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.qdev.reset = milkymist_ac97_reset,
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};
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static void milkymist_ac97_register(void)
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{
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sysbus_register_withprop(&milkymist_ac97_info);
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}
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device_init(milkymist_ac97_register)
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12
trace-events
12
trace-events
@ -286,3 +286,15 @@ disable lm32_uart_irq_state(int level) "irq state %d"
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# hw/lm32_sys.c
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disable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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# hw/milkymist-ac97.c
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disable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
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disable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
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disable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
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disable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
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disable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
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disable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
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disable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
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disable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
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disable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
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disable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
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