target/riscv: rvv: Prune redundant access_type parameter passed
No functional change intended in this commit. Signed-off-by: eop Chen <eop.chen@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <165449614532.19704.7000832880482980398-2@git.sr.ht> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -231,7 +231,7 @@ vext_ldst_stride(void *vd, void *v0, target_ulong base,
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target_ulong stride, CPURISCVState *env,
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uint32_t desc, uint32_t vm,
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vext_ldst_elem_fn *ldst_elem,
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uint32_t esz, uintptr_t ra, MMUAccessType access_type)
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uint32_t esz, uintptr_t ra)
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{
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uint32_t i, k;
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uint32_t nf = vext_nf(desc);
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@ -259,7 +259,7 @@ void HELPER(NAME)(void *vd, void * v0, target_ulong base, \
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{ \
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uint32_t vm = vext_vm(desc); \
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vext_ldst_stride(vd, v0, base, stride, env, desc, vm, LOAD_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_LOAD); \
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ctzl(sizeof(ETYPE)), GETPC()); \
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}
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GEN_VEXT_LD_STRIDE(vlse8_v, int8_t, lde_b)
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@ -274,7 +274,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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{ \
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uint32_t vm = vext_vm(desc); \
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vext_ldst_stride(vd, v0, base, stride, env, desc, vm, STORE_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
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ctzl(sizeof(ETYPE)), GETPC()); \
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}
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GEN_VEXT_ST_STRIDE(vsse8_v, int8_t, ste_b)
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@ -290,7 +290,7 @@ GEN_VEXT_ST_STRIDE(vsse64_v, int64_t, ste_d)
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static void
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vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
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vext_ldst_elem_fn *ldst_elem, uint32_t esz, uint32_t evl,
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uintptr_t ra, MMUAccessType access_type)
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uintptr_t ra)
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{
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uint32_t i, k;
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uint32_t nf = vext_nf(desc);
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@ -319,14 +319,14 @@ void HELPER(NAME##_mask)(void *vd, void *v0, target_ulong base, \
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{ \
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uint32_t stride = vext_nf(desc) << ctzl(sizeof(ETYPE)); \
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vext_ldst_stride(vd, v0, base, stride, env, desc, false, LOAD_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_LOAD); \
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ctzl(sizeof(ETYPE)), GETPC()); \
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} \
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\
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void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_us(vd, base, env, desc, LOAD_FN, \
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ctzl(sizeof(ETYPE)), env->vl, GETPC(), MMU_DATA_LOAD); \
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ctzl(sizeof(ETYPE)), env->vl, GETPC()); \
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}
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GEN_VEXT_LD_US(vle8_v, int8_t, lde_b)
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@ -340,14 +340,14 @@ void HELPER(NAME##_mask)(void *vd, void *v0, target_ulong base, \
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{ \
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uint32_t stride = vext_nf(desc) << ctzl(sizeof(ETYPE)); \
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vext_ldst_stride(vd, v0, base, stride, env, desc, false, STORE_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
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ctzl(sizeof(ETYPE)), GETPC()); \
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} \
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\
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void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_us(vd, base, env, desc, STORE_FN, \
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ctzl(sizeof(ETYPE)), env->vl, GETPC(), MMU_DATA_STORE); \
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ctzl(sizeof(ETYPE)), env->vl, GETPC()); \
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}
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GEN_VEXT_ST_US(vse8_v, int8_t, ste_b)
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@ -364,7 +364,7 @@ void HELPER(vlm_v)(void *vd, void *v0, target_ulong base,
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/* evl = ceil(vl/8) */
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uint8_t evl = (env->vl + 7) >> 3;
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vext_ldst_us(vd, base, env, desc, lde_b,
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0, evl, GETPC(), MMU_DATA_LOAD);
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0, evl, GETPC());
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}
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void HELPER(vsm_v)(void *vd, void *v0, target_ulong base,
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@ -373,7 +373,7 @@ void HELPER(vsm_v)(void *vd, void *v0, target_ulong base,
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/* evl = ceil(vl/8) */
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uint8_t evl = (env->vl + 7) >> 3;
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vext_ldst_us(vd, base, env, desc, ste_b,
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0, evl, GETPC(), MMU_DATA_STORE);
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0, evl, GETPC());
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}
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/*
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@ -399,7 +399,7 @@ vext_ldst_index(void *vd, void *v0, target_ulong base,
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void *vs2, CPURISCVState *env, uint32_t desc,
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vext_get_index_addr get_index_addr,
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vext_ldst_elem_fn *ldst_elem,
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uint32_t esz, uintptr_t ra, MMUAccessType access_type)
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uint32_t esz, uintptr_t ra)
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{
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uint32_t i, k;
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uint32_t nf = vext_nf(desc);
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@ -427,7 +427,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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void *vs2, CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_index(vd, v0, base, vs2, env, desc, INDEX_FN, \
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LOAD_FN, ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_LOAD); \
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LOAD_FN, ctzl(sizeof(ETYPE)), GETPC()); \
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}
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GEN_VEXT_LD_INDEX(vlxei8_8_v, int8_t, idx_b, lde_b)
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@ -453,7 +453,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
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{ \
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vext_ldst_index(vd, v0, base, vs2, env, desc, INDEX_FN, \
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STORE_FN, ctzl(sizeof(ETYPE)), \
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GETPC(), MMU_DATA_STORE); \
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GETPC()); \
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}
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GEN_VEXT_ST_INDEX(vsxei8_8_v, int8_t, idx_b, ste_b)
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@ -576,8 +576,7 @@ GEN_VEXT_LDFF(vle64ff_v, int64_t, lde_d)
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*/
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static void
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vext_ldst_whole(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
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vext_ldst_elem_fn *ldst_elem, uint32_t esz, uintptr_t ra,
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MMUAccessType access_type)
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vext_ldst_elem_fn *ldst_elem, uint32_t esz, uintptr_t ra)
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{
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uint32_t i, k, off, pos;
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uint32_t nf = vext_nf(desc);
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@ -612,8 +611,7 @@ void HELPER(NAME)(void *vd, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_whole(vd, base, env, desc, LOAD_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), \
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MMU_DATA_LOAD); \
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ctzl(sizeof(ETYPE)), GETPC()); \
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}
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GEN_VEXT_LD_WHOLE(vl1re8_v, int8_t, lde_b)
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@ -638,8 +636,7 @@ void HELPER(NAME)(void *vd, target_ulong base, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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vext_ldst_whole(vd, base, env, desc, STORE_FN, \
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ctzl(sizeof(ETYPE)), GETPC(), \
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MMU_DATA_STORE); \
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ctzl(sizeof(ETYPE)), GETPC()); \
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}
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GEN_VEXT_ST_WHOLE(vs1r_v, int8_t, ste_b)
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