target/arm: Always enable pac keys for user-only
Drop the pac properties. This approach cannot work as written
because the properties are applied before arm_cpu_reset, which
zeros SCTLR_EL1 (amongst everything else).
We can re-introduce the properties if they turn out to be useful.
But since linux 5.0 enables all of the keys, they may not be.
Fixes: 1ae9cfbd47
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
42f6ed9193
commit
276c6e8137
|
@ -185,6 +185,9 @@ static void arm_cpu_reset(CPUState *s)
|
||||||
env->pstate = PSTATE_MODE_EL0t;
|
env->pstate = PSTATE_MODE_EL0t;
|
||||||
/* Userspace expects access to DC ZVA, CTL_EL0 and the cache ops */
|
/* Userspace expects access to DC ZVA, CTL_EL0 and the cache ops */
|
||||||
env->cp15.sctlr_el[1] |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE;
|
env->cp15.sctlr_el[1] |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE;
|
||||||
|
/* Enable all PAC keys. */
|
||||||
|
env->cp15.sctlr_el[1] |= (SCTLR_EnIA | SCTLR_EnIB |
|
||||||
|
SCTLR_EnDA | SCTLR_EnDB);
|
||||||
/* Enable all PAC instructions */
|
/* Enable all PAC instructions */
|
||||||
env->cp15.hcr_el2 |= HCR_API;
|
env->cp15.hcr_el2 |= HCR_API;
|
||||||
env->cp15.scr_el3 |= SCR_API;
|
env->cp15.scr_el3 |= SCR_API;
|
||||||
|
|
|
@ -281,38 +281,6 @@ static void cpu_max_set_sve_vq(Object *obj, Visitor *v, const char *name,
|
||||||
error_propagate(errp, err);
|
error_propagate(errp, err);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_USER_ONLY
|
|
||||||
static void cpu_max_get_packey(Object *obj, Visitor *v, const char *name,
|
|
||||||
void *opaque, Error **errp)
|
|
||||||
{
|
|
||||||
ARMCPU *cpu = ARM_CPU(obj);
|
|
||||||
const uint64_t *bit = opaque;
|
|
||||||
bool enabled = (cpu->env.cp15.sctlr_el[1] & *bit) != 0;
|
|
||||||
|
|
||||||
visit_type_bool(v, name, &enabled, errp);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void cpu_max_set_packey(Object *obj, Visitor *v, const char *name,
|
|
||||||
void *opaque, Error **errp)
|
|
||||||
{
|
|
||||||
ARMCPU *cpu = ARM_CPU(obj);
|
|
||||||
Error *err = NULL;
|
|
||||||
const uint64_t *bit = opaque;
|
|
||||||
bool enabled;
|
|
||||||
|
|
||||||
visit_type_bool(v, name, &enabled, errp);
|
|
||||||
|
|
||||||
if (!err) {
|
|
||||||
if (enabled) {
|
|
||||||
cpu->env.cp15.sctlr_el[1] |= *bit;
|
|
||||||
} else {
|
|
||||||
cpu->env.cp15.sctlr_el[1] &= ~*bit;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
error_propagate(errp, err);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
|
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
|
||||||
* otherwise, a CPU with as many features enabled as our emulation supports.
|
* otherwise, a CPU with as many features enabled as our emulation supports.
|
||||||
* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
|
* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
|
||||||
|
@ -388,34 +356,6 @@ static void aarch64_max_initfn(Object *obj)
|
||||||
*/
|
*/
|
||||||
cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
|
cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
|
||||||
cpu->dcz_blocksize = 7; /* 512 bytes */
|
cpu->dcz_blocksize = 7; /* 512 bytes */
|
||||||
|
|
||||||
/*
|
|
||||||
* Note that Linux will enable enable all of the keys at once.
|
|
||||||
* But doing it this way will allow experimentation beyond that.
|
|
||||||
*/
|
|
||||||
{
|
|
||||||
static const uint64_t apia_bit = SCTLR_EnIA;
|
|
||||||
static const uint64_t apib_bit = SCTLR_EnIB;
|
|
||||||
static const uint64_t apda_bit = SCTLR_EnDA;
|
|
||||||
static const uint64_t apdb_bit = SCTLR_EnDB;
|
|
||||||
|
|
||||||
object_property_add(obj, "apia", "bool", cpu_max_get_packey,
|
|
||||||
cpu_max_set_packey, NULL,
|
|
||||||
(void *)&apia_bit, &error_fatal);
|
|
||||||
object_property_add(obj, "apib", "bool", cpu_max_get_packey,
|
|
||||||
cpu_max_set_packey, NULL,
|
|
||||||
(void *)&apib_bit, &error_fatal);
|
|
||||||
object_property_add(obj, "apda", "bool", cpu_max_get_packey,
|
|
||||||
cpu_max_set_packey, NULL,
|
|
||||||
(void *)&apda_bit, &error_fatal);
|
|
||||||
object_property_add(obj, "apdb", "bool", cpu_max_get_packey,
|
|
||||||
cpu_max_set_packey, NULL,
|
|
||||||
(void *)&apdb_bit, &error_fatal);
|
|
||||||
|
|
||||||
/* Enable all PAC keys by default. */
|
|
||||||
cpu->env.cp15.sctlr_el[1] |= SCTLR_EnIA | SCTLR_EnIB;
|
|
||||||
cpu->env.cp15.sctlr_el[1] |= SCTLR_EnDA | SCTLR_EnDB;
|
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
cpu->sve_max_vq = ARM_MAX_VQ;
|
cpu->sve_max_vq = ARM_MAX_VQ;
|
||||||
|
|
Loading…
Reference in New Issue