Add GEN_VXFORM_UIMM macro for subsequent instructions.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6173 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -372,6 +372,8 @@ EXTRACT_SHELPER(SIMM, 0, 16);
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EXTRACT_HELPER(UIMM, 0, 16);
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/* 5 bits signed immediate value */
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EXTRACT_HELPER(SIMM5, 16, 5);
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/* 5 bits signed immediate value */
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EXTRACT_HELPER(UIMM5, 16, 5);
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/* Bit count */
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EXTRACT_HELPER(NB, 11, 5);
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/* Shift count */
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@ -6288,6 +6290,24 @@ GEN_VXFORM(vrlw, 2, 2);
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tcg_temp_free_ptr(rd); \
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}
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#define GEN_VXFORM_UIMM(name, opc2, opc3) \
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GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
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{ \
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TCGv_ptr rb, rd; \
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TCGv_i32 uimm; \
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if (unlikely(!ctx->altivec_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VPU); \
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return; \
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} \
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uimm = tcg_const_i32(UIMM5(ctx->opcode)); \
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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gen_helper_##name (rd, rb, uimm); \
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tcg_temp_free_i32(uimm); \
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tcg_temp_free_ptr(rb); \
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tcg_temp_free_ptr(rd); \
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}
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GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC)
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{
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TCGv_ptr ra, rb, rd;
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