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target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h'

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TYPE_RISCV_CPU_BASE depends on the TARGET_RISCV32/TARGET_RISCV64
definitions which are target specific. Such target specific
definition taints "cpu-qom.h".

Since "cpu-qom.h" must be target agnostic, remove its target
specific definition uses by moving TYPE_RISCV_CPU_BASE to
"target/riscv/cpu.h".

"target/riscv/cpu-qom.h" is now fully target agnostic.
Add a comment clarifying that in the header.

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-12-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-06 09:45:40 +02:00
parent 2d8efe9666
commit 27a6e78ef0
2 changed files with 7 additions and 7 deletions
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8
target/riscv/cpu-qom.h
View File

@ -1,5 +1,5 @@
/*
* QEMU RISC-V CPU QOM header
* QEMU RISC-V CPU QOM header (target agnostic)
*
* Copyright (c) 2023 Ventana Micro Systems Inc.
*
@ -44,12 +44,6 @@
#define TYPE_RISCV_CPU_VEYRON_V1 RISCV_CPU_TYPE_NAME("veyron-v1")
#define TYPE_RISCV_CPU_HOST RISCV_CPU_TYPE_NAME("host")
#if defined(TARGET_RISCV32)
# define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE32
#elif defined(TARGET_RISCV64)
# define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE64
#endif
typedef struct CPUArchState CPURISCVState;
OBJECT_DECLARE_CPU_TYPE(RISCVCPU, RISCVCPUClass, RISCV_CPU)

6
target/riscv/cpu.h
View File

@ -34,6 +34,12 @@
#define CPU_RESOLVING_TYPE TYPE_RISCV_CPU
#if defined(TARGET_RISCV32)
# define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE32
#elif defined(TARGET_RISCV64)
# define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE64
#endif
#define TCG_GUEST_DEFAULT_MO 0
/*