target/microblaze: Add props enabling exceptions on failed bus accesses
Add MicroBlaze CPU properties to enable exceptions on failed bus accesses. Reviewed-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
parent
619ddf5b1a
commit
2867a96ffb
@ -202,7 +202,11 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
|
||||
(cpu->cfg.use_barrel ? PVR2_USE_BARREL_MASK : 0) |
|
||||
(cpu->cfg.use_div ? PVR2_USE_DIV_MASK : 0) |
|
||||
(cpu->cfg.use_msr_instr ? PVR2_USE_MSR_INSTR : 0) |
|
||||
(cpu->cfg.use_pcmp_instr ? PVR2_USE_PCMP_INSTR : 0);
|
||||
(cpu->cfg.use_pcmp_instr ? PVR2_USE_PCMP_INSTR : 0) |
|
||||
(cpu->cfg.dopb_bus_exception ?
|
||||
PVR2_DOPB_BUS_EXC_MASK : 0) |
|
||||
(cpu->cfg.iopb_bus_exception ?
|
||||
PVR2_IOPB_BUS_EXC_MASK : 0);
|
||||
|
||||
env->pvr.regs[5] |= cpu->cfg.dcache_writeback ?
|
||||
PVR5_DCACHE_WRITEBACK_MASK : 0;
|
||||
@ -265,6 +269,12 @@ static Property mb_properties[] = {
|
||||
DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
|
||||
false),
|
||||
DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
|
||||
/* Enables bus exceptions on failed data accesses (load/stores). */
|
||||
DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
|
||||
cfg.dopb_bus_exception, false),
|
||||
/* Enables bus exceptions on failed instruction fetches. */
|
||||
DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
|
||||
cfg.iopb_bus_exception, false),
|
||||
DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
|
||||
DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
|
@ -308,6 +308,8 @@ struct MicroBlazeCPU {
|
||||
bool use_mmu;
|
||||
bool dcache_writeback;
|
||||
bool endi;
|
||||
bool dopb_bus_exception;
|
||||
bool iopb_bus_exception;
|
||||
char *version;
|
||||
uint8_t pvr;
|
||||
} cfg;
|
||||
|
Loading…
Reference in New Issue
Block a user