From 288426fe3c50857752ca6e2d24d035a6ecc877d9 Mon Sep 17 00:00:00 2001 From: bellard Date: Sat, 10 May 2003 21:39:12 +0000 Subject: [PATCH] added LAR/LSL tests git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@152 c046a42c-6fe2-441c-8c8c-71466251a162 --- tests/test-i386.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/tests/test-i386.c b/tests/test-i386.c index 2130bfcabc..1b63a5b38a 100644 --- a/tests/test-i386.c +++ b/tests/test-i386.c @@ -707,6 +707,19 @@ uint8_t seg_data2[4096]; #define MK_SEL(n) (((n) << 3) | 7) +#define TEST_LR(op, size, seg, mask)\ +{\ + int res, res2;\ + res = 0x12345678;\ + asm (op " %" size "2, %" size "0\n" \ + "movl $0, %1\n"\ + "jnz 1f\n"\ + "movl $1, %1\n"\ + "1:\n"\ + : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\ + printf(op ": Z=%d %08x\n", res2, res & ~(mask));\ +} + /* NOTE: we use Linux modify_ldt syscall */ void test_segs(void) { @@ -784,6 +797,16 @@ void test_segs(void) : "=r" (res), "=g" (res2) : "m" (segoff)); printf("FS:reg = %04x:%08x\n", res2, res); + + TEST_LR("larw", "w", MK_SEL(2), 0x0100); + TEST_LR("larl", "", MK_SEL(2), 0x0100); + TEST_LR("lslw", "w", MK_SEL(2), 0); + TEST_LR("lsll", "", MK_SEL(2), 0); + + TEST_LR("larw", "w", 0xfff8, 0); + TEST_LR("larl", "", 0xfff8, 0); + TEST_LR("lslw", "w", 0xfff8, 0); + TEST_LR("lsll", "", 0xfff8, 0); } /* 16 bit code test */