target-ppc: Introduce DFP Convert to Long/Extended

Add emulation of the PowerPC Convert to DFP Long (dctdp[.]) and
Convert to DFP Extended (dctqpq[.]) instructions.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-04-21 15:55:13 -05:00 committed by Alexander Graf
parent 97c0d93041
commit 290d9ee537
3 changed files with 39 additions and 0 deletions

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@ -286,6 +286,15 @@ static void dfp_check_for_VXSNAN(struct PPC_DFP *dfp)
}
}
static void dfp_check_for_VXSNAN_and_convert_to_QNaN(struct PPC_DFP *dfp)
{
if (decNumberIsSNaN(&dfp->t)) {
dfp->t.bits &= ~DECSNAN;
dfp->t.bits |= DECNAN;
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXSNAN, FP_VE);
}
}
static void dfp_check_for_VXISI(struct PPC_DFP *dfp, int testForSameSign)
{
if (dfp->context.status & DEC_Invalid_operation) {
@ -840,3 +849,27 @@ static void RINTN_PPs(struct PPC_DFP *dfp)
DFP_HELPER_RINT(drintn, RINTN_PPs, 64)
DFP_HELPER_RINT(drintnq, RINTN_PPs, 128)
void helper_dctdp(CPUPPCState *env, uint64_t *t, uint64_t *b)
{
struct PPC_DFP dfp;
uint32_t b_short = *b;
dfp_prepare_decimal64(&dfp, 0, 0, env);
decimal32ToNumber((decimal32 *)&b_short, &dfp.t);
decimal64FromNumber((decimal64 *)t, &dfp.t, &dfp.context);
dfp_set_FPRF_from_FRT(&dfp);
}
void helper_dctqpq(CPUPPCState *env, uint64_t *t, uint64_t *b)
{
struct PPC_DFP dfp;
dfp_prepare_decimal128(&dfp, 0, 0, env);
decimal64ToNumber((decimal64 *)b, &dfp.t);
dfp_check_for_VXSNAN_and_convert_to_QNaN(&dfp);
dfp_set_FPRF_from_FRT(&dfp);
decimal128FromNumber((decimal128 *)&dfp.t64, &dfp.t, &dfp.context);
t[0] = dfp.t64[HI_IDX];
t[1] = dfp.t64[LO_IDX];
}

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@ -646,3 +646,5 @@ DEF_HELPER_5(drintx, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(drintxq, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(drintn, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(drintnq, void, env, fprp, fprp, i32, i32)
DEF_HELPER_3(dctdp, void, env, fprp, fprp)
DEF_HELPER_3(dctqpq, void, env, fprp, fprp)

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@ -8386,6 +8386,8 @@ GEN_DFP_T_B_U32_U32_Rc(drintx, FPW, RMC)
GEN_DFP_T_B_U32_U32_Rc(drintxq, FPW, RMC)
GEN_DFP_T_B_U32_U32_Rc(drintn, FPW, RMC)
GEN_DFP_T_B_U32_U32_Rc(drintnq, FPW, RMC)
GEN_DFP_T_B_Rc(dctdp)
GEN_DFP_T_B_Rc(dctqpq)
/*** SPE extension ***/
/* Register moves */
@ -11343,6 +11345,8 @@ GEN_DFP_R_T_B_RMC_Rc(drintx, 0x03, 0x03),
GEN_DFP_R_Tp_Bp_RMC_Rc(drintxq, 0x03, 0x03),
GEN_DFP_R_T_B_RMC_Rc(drintn, 0x03, 0x07),
GEN_DFP_R_Tp_Bp_RMC_Rc(drintnq, 0x03, 0x07),
GEN_DFP_T_B_Rc(dctdp, 0x02, 0x08),
GEN_DFP_Tp_B_Rc(dctqpq, 0x02, 0x08),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)