From 292363e15c92fd37bcb424fafebc2e362b6c8f03 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 23 Jan 2014 17:47:44 +0100 Subject: [PATCH] target-ppc: Make ppc40x CPUs available in ppcemb MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not only 44x CPUs (BookE) but also 40x CPUs can run with 1k page size. Move the criteria to a central inline function to avoid repetition and #ifdef'fery. Update qom-test to no longer exempt them. Signed-off-by: Andreas Färber --- target-ppc/translate_init.c | 38 ++++++++++++++++++------------------- tests/qom-test.c | 3 --- 2 files changed, 19 insertions(+), 22 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index c030a2032a..445c3606fe 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7960,6 +7960,17 @@ static int ppc_fixup_cpu(PowerPCCPU *cpu) return 0; } +static inline bool ppc_cpu_is_valid(PowerPCCPUClass *pcc) +{ +#ifdef TARGET_PPCEMB + return pcc->mmu_model == POWERPC_MMU_BOOKE || + pcc->mmu_model == POWERPC_MMU_SOFT_4xx || + pcc->mmu_model == POWERPC_MMU_SOFT_4xx_Z; +#else + return true; +#endif +} + static void ppc_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); @@ -7991,8 +8002,8 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp) } #if defined(TARGET_PPCEMB) - if (pcc->mmu_model != POWERPC_MMU_BOOKE) { - error_setg(errp, "CPU does not possess a BookE MMU. " + if (!ppc_cpu_is_valid(pcc)) { + error_setg(errp, "CPU does not possess a BookE or 4xx MMU. " "Please use qemu-system-ppc or qemu-system-ppc64 instead " "or choose another CPU model."); return; @@ -8209,11 +8220,9 @@ static gint ppc_cpu_compare_class_pvr(gconstpointer a, gconstpointer b) return -1; } -#if defined(TARGET_PPCEMB) - if (pcc->mmu_model != POWERPC_MMU_BOOKE) { + if (!ppc_cpu_is_valid(pcc)) { return -1; } -#endif return pcc->pvr == pvr ? 0 : -1; } @@ -8246,11 +8255,10 @@ static gint ppc_cpu_compare_class_pvr_mask(gconstpointer a, gconstpointer b) return -1; } -#if defined(TARGET_PPCEMB) - if (pcc->mmu_model != POWERPC_MMU_BOOKE) { + if (!ppc_cpu_is_valid(pcc)) { return -1; } -#endif + ret = (((pcc->pvr & pcc->pvr_mask) == (pvr & pcc->pvr_mask)) ? 0 : -1); return ret; @@ -8275,14 +8283,10 @@ static gint ppc_cpu_compare_class_name(gconstpointer a, gconstpointer b) { ObjectClass *oc = (ObjectClass *)a; const char *name = b; -#if defined(TARGET_PPCEMB) PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); -#endif if (strncasecmp(name, object_class_get_name(oc), strlen(name)) == 0 && -#if defined(TARGET_PPCEMB) - pcc->mmu_model == POWERPC_MMU_BOOKE && -#endif + ppc_cpu_is_valid(pcc) && strcmp(object_class_get_name(oc) + strlen(name), "-" TYPE_POWERPC_CPU) == 0) { return 0; @@ -8414,11 +8418,9 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) char *name; int i; -#if defined(TARGET_PPCEMB) - if (pcc->mmu_model != POWERPC_MMU_BOOKE) { + if (!ppc_cpu_is_valid(pcc)) { return; } -#endif if (unlikely(strcmp(typename, TYPE_HOST_POWERPC_CPU) == 0)) { return; } @@ -8466,13 +8468,11 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) const char *typename; CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; -#if defined(TARGET_PPCEMB) PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); - if (pcc->mmu_model != POWERPC_MMU_BOOKE) { + if (!ppc_cpu_is_valid(pcc)) { return; } -#endif typename = object_class_get_name(oc); info = g_malloc0(sizeof(*info)); diff --git a/tests/qom-test.c b/tests/qom-test.c index 5e5af7a50f..4dd23f8ad0 100644 --- a/tests/qom-test.c +++ b/tests/qom-test.c @@ -221,10 +221,7 @@ int main(int argc, char **argv) } else if (strcmp(arch, "or32") == 0) { ADD_MACHINE_TESTS(arch, openrisc_machines); } else if (strcmp(arch, "ppcemb") == 0) { -#if 0 - /* XXX Available in ppcemb but don't work */ ADD_MACHINE_TESTS(arch, ppc405_machines); -#endif ADD_MACHINE_TESTS(arch, ppc440_machines); } else if (strcmp(arch, "ppc") == 0) { ADD_MACHINE_TESTS(arch, ppc405_machines);