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target/ppc: vmulh* instructions without helpers 

Changed vmulhuw, vmulhud, vmulhsw, vmulhsd to not
use helpers.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-5-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Lucas Mateus Castro (alqotel) 2022-03-02 06:51:36 +01:00 committed by Cédric Le Goater
parent d45da01428
commit 29e9dfcf75
3 changed files with 87 additions and 43 deletions
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4
target/ppc/helper.h
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@ -204,10 +204,6 @@ DEF_HELPER_FLAGS_3(VMULOSW, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULOUB, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULOUH, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULOUW, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULHSW, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULHUW, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULHSD, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_FLAGS_3(VMULHUD, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_3(vslo, void, avr, avr, avr)
DEF_HELPER_3(vsro, void, avr, avr, avr)
DEF_HELPER_3(vsrv, void, avr, avr, avr)

35
target/ppc/int_helper.c
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@ -1097,41 +1097,6 @@ VMUL(UW, u32, VsrW, VsrD, uint64_t)
#undef VMUL_DO_ODD
#undef VMUL
void helper_VMULHSW(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
{
int i;
for (i = 0; i < 4; i++) {
r->s32[i] = (int32_t)(((int64_t)a->s32[i] * (int64_t)b->s32[i]) >> 32);
}
}
void helper_VMULHUW(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
{
int i;
for (i = 0; i < 4; i++) {
r->u32[i] = (uint32_t)(((uint64_t)a->u32[i] *
(uint64_t)b->u32[i]) >> 32);
}
}
void helper_VMULHSD(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
{
uint64_t discard;
muls64(&discard, &r->u64[0], a->s64[0], b->s64[0]);
muls64(&discard, &r->u64[1], a->s64[1], b->s64[1]);
}
void helper_VMULHUD(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
{
uint64_t discard;
mulu64(&discard, &r->u64[0], a->u64[0], b->u64[0]);
mulu64(&discard, &r->u64[1], a->u64[1], b->u64[1]);
}
void helper_vperm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
ppc_avr_t *c)
{

91
target/ppc/translate/vmx-impl.c.inc
View File

@ -2151,10 +2151,93 @@ TRANS_FLAGS2(ISA310, VMULOSD, do_vx_vmuleo, false, tcg_gen_muls2_i64)
TRANS_FLAGS2(ISA310, VMULEUD, do_vx_vmuleo, true , tcg_gen_mulu2_i64)
TRANS_FLAGS2(ISA310, VMULOUD, do_vx_vmuleo, false, tcg_gen_mulu2_i64)
TRANS_FLAGS2(ISA310, VMULHSW, do_vx_helper, gen_helper_VMULHSW)
TRANS_FLAGS2(ISA310, VMULHSD, do_vx_helper, gen_helper_VMULHSD)
TRANS_FLAGS2(ISA310, VMULHUW, do_vx_helper, gen_helper_VMULHUW)
TRANS_FLAGS2(ISA310, VMULHUD, do_vx_helper, gen_helper_VMULHUD)
static void do_vx_vmulhw_i64(TCGv_i64 t, TCGv_i64 a, TCGv_i64 b, bool sign)
{
TCGv_i64 hh, lh, temp;
uint64_t c;
hh = tcg_temp_new_i64();
lh = tcg_temp_new_i64();
temp = tcg_temp_new_i64();
c = 0xFFFFFFFF;
if (sign) {
tcg_gen_ext32s_i64(lh, a);
tcg_gen_ext32s_i64(temp, b);
} else {
tcg_gen_andi_i64(lh, a, c);
tcg_gen_andi_i64(temp, b, c);
}
tcg_gen_mul_i64(lh, lh, temp);
if (sign) {
tcg_gen_sari_i64(hh, a, 32);
tcg_gen_sari_i64(temp, b, 32);
} else {
tcg_gen_shri_i64(hh, a, 32);
tcg_gen_shri_i64(temp, b, 32);
}
tcg_gen_mul_i64(hh, hh, temp);
tcg_gen_shri_i64(lh, lh, 32);
tcg_gen_andi_i64(hh, hh, c << 32);
tcg_gen_or_i64(t, hh, lh);
tcg_temp_free_i64(hh);
tcg_temp_free_i64(lh);
tcg_temp_free_i64(temp);
}
static void do_vx_vmulhd_i64(TCGv_i64 t, TCGv_i64 a, TCGv_i64 b, bool sign)
{
TCGv_i64 tlow;
tlow = tcg_temp_new_i64();
if (sign) {
tcg_gen_muls2_i64(tlow, t, a, b);
} else {
tcg_gen_mulu2_i64(tlow, t, a, b);
}
tcg_temp_free_i64(tlow);
}
static bool do_vx_mulh(DisasContext *ctx, arg_VX *a, bool sign,
void (*func)(TCGv_i64, TCGv_i64, TCGv_i64, bool))
{
REQUIRE_INSNS_FLAGS2(ctx, ISA310);
REQUIRE_VECTOR(ctx);
TCGv_i64 vra, vrb, vrt;
int i;
vra = tcg_temp_new_i64();
vrb = tcg_temp_new_i64();
vrt = tcg_temp_new_i64();
for (i = 0; i < 2; i++) {
get_avr64(vra, a->vra, i);
get_avr64(vrb, a->vrb, i);
get_avr64(vrt, a->vrt, i);
func(vrt, vra, vrb, sign);
set_avr64(a->vrt, vrt, i);
}
tcg_temp_free_i64(vra);
tcg_temp_free_i64(vrb);
tcg_temp_free_i64(vrt);
return true;
}
TRANS(VMULHSW, do_vx_mulh, true , do_vx_vmulhw_i64)
TRANS(VMULHSD, do_vx_mulh, true , do_vx_vmulhd_i64)
TRANS(VMULHUW, do_vx_mulh, false, do_vx_vmulhw_i64)
TRANS(VMULHUD, do_vx_mulh, false, do_vx_vmulhd_i64)
#undef GEN_VR_LDX
#undef GEN_VR_STX