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target/mips: Don't check COP1X for 64 bit FP mode 

Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.

As the eligibility of 64 bit FP instructions is already determined
by CP0St_FR, there is no need to check for COP1X again.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com>
[PMD: Add missing trailing parenthesis (buildfix)]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Jiaxun Yang 2022-11-02 16:57:18 +00:00 committed by Philippe Mathieu-Daudé
parent 4bfc895383
commit 2a2105a262
1 changed files with 1 additions and 1 deletions
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target/mips/tcg/translate.c
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@ -1545,7 +1545,7 @@ void check_cop1x(DisasContext *ctx)
*/ */
void check_cp1_64bitmode(DisasContext *ctx) void check_cp1_64bitmode(DisasContext *ctx)
{ {
if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | MIPS_HFLAG_COP1X))) { if (unlikely(~ctx->hflags & MIPS_HFLAG_F64)) {
gen_reserved_instruction(ctx); gen_reserved_instruction(ctx);
} }
} }