target-i386: emulate LOCK'ed NOT using atomic helper
[rth: Avoid qemu_load that's redundant with the atomic op.] Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <1467054136-10430-15-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -4674,10 +4674,15 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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rm = (modrm & 7) | REX_B(s);
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op = (modrm >> 3) & 7;
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if (mod != 3) {
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if (op == 0)
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if (op == 0) {
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s->rip_offset = insn_const_size(ot);
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}
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gen_lea_modrm(env, s, modrm);
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gen_op_ld_v(s, ot, cpu_T0, cpu_A0);
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/* For those below that handle locked memory, don't load here. */
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if (!(s->prefix & PREFIX_LOCK)
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|| op != 2) {
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gen_op_ld_v(s, ot, cpu_T0, cpu_A0);
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}
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} else {
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gen_op_mov_v_reg(ot, cpu_T0, rm);
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}
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@ -4690,11 +4695,20 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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set_cc_op(s, CC_OP_LOGICB + ot);
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break;
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case 2: /* not */
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tcg_gen_not_tl(cpu_T0, cpu_T0);
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if (mod != 3) {
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gen_op_st_v(s, ot, cpu_T0, cpu_A0);
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if (s->prefix & PREFIX_LOCK) {
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if (mod == 3) {
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goto illegal_op;
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}
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tcg_gen_movi_tl(cpu_T0, ~0);
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tcg_gen_atomic_xor_fetch_tl(cpu_T0, cpu_A0, cpu_T0,
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s->mem_index, ot | MO_LE);
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} else {
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gen_op_mov_reg_v(ot, rm, cpu_T0);
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tcg_gen_not_tl(cpu_T0, cpu_T0);
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if (mod != 3) {
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gen_op_st_v(s, ot, cpu_T0, cpu_A0);
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} else {
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gen_op_mov_reg_v(ot, rm, cpu_T0);
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}
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}
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break;
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case 3: /* neg */
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