target/arm/sme: Introduce aarch64_set_svcr()
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-4-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -93,8 +93,8 @@ void cpu_loop(CPUARMState *env)
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* On syscall, PSTATE.ZA is preserved, along with the ZA matrix.
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* PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState.
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*/
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aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
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if (FIELD_EX64(env->svcr, SVCR, SM)) {
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env->svcr = FIELD_DP64(env->svcr, SVCR, SM, 0);
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arm_rebuild_hflags(env);
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arm_reset_sve_state(env);
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}
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@ -669,11 +669,11 @@ static void target_setup_frame(int usig, struct target_sigaction *ka,
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* Invoke the signal handler with both SM and ZA disabled.
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* When clearing SM, ResetSVEState, per SMSTOP.
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*/
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aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
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if (FIELD_EX64(env->svcr, SVCR, SM)) {
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arm_reset_sve_state(env);
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}
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if (env->svcr) {
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env->svcr = 0;
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arm_rebuild_hflags(env);
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}
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@ -1123,6 +1123,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
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void aarch64_sve_change_el(CPUARMState *env, int old_el,
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int new_el, bool el0_a64);
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void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask);
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void arm_reset_sve_state(CPUARMState *env);
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/*
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@ -6725,11 +6725,19 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri,
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return CP_ACCESS_OK;
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}
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void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
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{
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uint64_t change = (env->svcr ^ new) & mask;
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env->svcr ^= change;
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}
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static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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uint64_t value)
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{
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helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM));
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helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA));
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aarch64_set_svcr(env, value, -1);
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arm_rebuild_hflags(env);
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}
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@ -43,7 +43,7 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
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if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
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return;
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}
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env->svcr ^= R_SVCR_SM_MASK;
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aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
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arm_reset_sve_state(env);
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arm_rebuild_hflags(env);
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}
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@ -53,7 +53,7 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i)
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if (i == FIELD_EX64(env->svcr, SVCR, ZA)) {
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return;
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}
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env->svcr ^= R_SVCR_ZA_MASK;
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aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK);
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/*
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* ResetSMEState.
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