target/arm: Use aesdec_ISB_ISR_AK
This implements the AESD instruction. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -48,26 +48,6 @@ static void clear_tail_16(void *vd, uint32_t desc)
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static const AESState aes_zero = { };
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static void do_crypto_aese(uint64_t *rd, uint64_t *rn, uint64_t *rm,
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const uint8_t *sbox, const uint8_t *shift)
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{
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union CRYPTO_STATE rk = { .l = { rm[0], rm[1] } };
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union CRYPTO_STATE st = { .l = { rn[0], rn[1] } };
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int i;
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/* xor state vector with round key */
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rk.l[0] ^= st.l[0];
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rk.l[1] ^= st.l[1];
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/* combine ShiftRows operation and sbox substitution */
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for (i = 0; i < 16; i++) {
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CR_ST_BYTE(st, i) = sbox[CR_ST_BYTE(rk, shift[i])];
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}
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rd[0] = st.l[0];
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rd[1] = st.l[1];
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}
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void HELPER(crypto_aese)(void *vd, void *vn, void *vm, uint32_t desc)
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{
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intptr_t i, opr_sz = simd_oprsz(desc);
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@ -102,7 +82,22 @@ void HELPER(crypto_aesd)(void *vd, void *vn, void *vm, uint32_t desc)
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intptr_t i, opr_sz = simd_oprsz(desc);
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for (i = 0; i < opr_sz; i += 16) {
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do_crypto_aese(vd + i, vn + i, vm + i, AES_isbox, AES_ishifts);
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AESState *ad = (AESState *)(vd + i);
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AESState *st = (AESState *)(vn + i);
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AESState *rk = (AESState *)(vm + i);
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AESState t;
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/* Our uint64_t are in the wrong order for big-endian. */
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if (HOST_BIG_ENDIAN) {
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t.d[0] = st->d[1] ^ rk->d[1];
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t.d[1] = st->d[0] ^ rk->d[0];
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aesdec_ISB_ISR_AK(&t, &t, &aes_zero, false);
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ad->d[0] = t.d[1];
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ad->d[1] = t.d[0];
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} else {
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t.v = st->v ^ rk->v;
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aesdec_ISB_ISR_AK(ad, &t, &aes_zero, false);
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}
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}
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clear_tail(vd, opr_sz, simd_maxsz(desc));
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}
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