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target/arm: Use aesdec_ISB_ISR_AK 

This implements the AESD instruction.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-06-02 01:15:31 -07:00
parent 552d892494
commit 2a8b545ffd
1 changed files with 16 additions and 21 deletions
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37
target/arm/tcg/crypto_helper.c
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@ -48,26 +48,6 @@ static void clear_tail_16(void *vd, uint32_t desc)
static const AESState aes_zero = { };
static void do_crypto_aese(uint64_t *rd, uint64_t *rn, uint64_t *rm,
const uint8_t *sbox, const uint8_t *shift)
{
union CRYPTO_STATE rk = { .l = { rm[0], rm[1] } };
union CRYPTO_STATE st = { .l = { rn[0], rn[1] } };
int i;
/* xor state vector with round key */
rk.l[0] ^= st.l[0];
rk.l[1] ^= st.l[1];
/* combine ShiftRows operation and sbox substitution */
for (i = 0; i < 16; i++) {
CR_ST_BYTE(st, i) = sbox[CR_ST_BYTE(rk, shift[i])];
}
rd[0] = st.l[0];
rd[1] = st.l[1];
}
void HELPER(crypto_aese)(void *vd, void *vn, void *vm, uint32_t desc)
{
intptr_t i, opr_sz = simd_oprsz(desc);
@ -102,7 +82,22 @@ void HELPER(crypto_aesd)(void *vd, void *vn, void *vm, uint32_t desc)
intptr_t i, opr_sz = simd_oprsz(desc);
for (i = 0; i < opr_sz; i += 16) {
do_crypto_aese(vd + i, vn + i, vm + i, AES_isbox, AES_ishifts);
AESState *ad = (AESState *)(vd + i);
AESState *st = (AESState *)(vn + i);
AESState *rk = (AESState *)(vm + i);
AESState t;
/* Our uint64_t are in the wrong order for big-endian. */
if (HOST_BIG_ENDIAN) {
t.d[0] = st->d[1] ^ rk->d[1];
t.d[1] = st->d[0] ^ rk->d[0];
aesdec_ISB_ISR_AK(&t, &t, &aes_zero, false);
ad->d[0] = t.d[1];
ad->d[1] = t.d[0];
} else {
t.v = st->v ^ rk->v;
aesdec_ISB_ISR_AK(ad, &t, &aes_zero, false);
}
}
clear_tail(vd, opr_sz, simd_maxsz(desc));
}