hw/xen: Support HVM_PARAM_CALLBACK_TYPE_PCI_INTX callback
The guest is permitted to specify an arbitrary domain/bus/device/function and INTX pin from which the callback IRQ shall appear to have come. In QEMU we can only easily do this for devices that actually exist, and even that requires us "knowing" that it's a PCMachine in order to find the PCI root bus — although that's OK really because it's always true. We also don't get to get notified of INTX routing changes, because we can't do that as a passive observer; if we try to register a notifier it will overwrite any existing notifier callback on the device. But in practice, guests using PCI_INTX will only ever use pin A on the Xen platform device, and won't swizzle the INTX routing after they set it up. So this is just fine. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
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@ -28,6 +28,8 @@
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#include "hw/sysbus.h"
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#include "hw/xen/xen.h"
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#include "hw/i386/x86.h"
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#include "hw/i386/pc.h"
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#include "hw/pci/pci.h"
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#include "hw/irq.h"
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#include "xen_evtchn.h"
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@ -101,6 +103,7 @@ struct XenEvtchnState {
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uint64_t callback_param;
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bool evtchn_in_kernel;
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uint32_t callback_gsi;
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QEMUBH *gsi_bh;
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@ -217,11 +220,41 @@ static void xen_evtchn_register_types(void)
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type_init(xen_evtchn_register_types)
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static int set_callback_pci_intx(XenEvtchnState *s, uint64_t param)
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{
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PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
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uint8_t pin = param & 3;
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uint8_t devfn = (param >> 8) & 0xff;
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uint16_t bus = (param >> 16) & 0xffff;
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uint16_t domain = (param >> 32) & 0xffff;
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PCIDevice *pdev;
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PCIINTxRoute r;
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if (domain || !pcms) {
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return 0;
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}
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pdev = pci_find_device(pcms->bus, bus, devfn);
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if (!pdev) {
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return 0;
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}
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r = pci_device_route_intx_to_irq(pdev, pin);
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if (r.mode != PCI_INTX_ENABLED) {
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return 0;
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}
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/*
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* Hm, can we be notified of INTX routing changes? Not without
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* *owning* the device and being allowed to overwrite its own
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* ->intx_routing_notifier, AFAICT. So let's not.
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*/
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return r.irq;
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}
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void xen_evtchn_set_callback_level(int level)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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uint32_t param;
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if (!s) {
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return;
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}
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@ -260,19 +293,13 @@ void xen_evtchn_set_callback_level(int level)
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return;
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}
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param = (uint32_t)s->callback_param;
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switch (s->callback_param >> CALLBACK_VIA_TYPE_SHIFT) {
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case HVM_PARAM_CALLBACK_TYPE_GSI:
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if (param < IOAPIC_NUM_PINS) {
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qemu_set_irq(s->gsis[param], level);
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if (s->callback_gsi && s->callback_gsi < IOAPIC_NUM_PINS) {
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qemu_set_irq(s->gsis[s->callback_gsi], level);
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if (level) {
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/* Ensure the vCPU polls for deassertion */
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kvm_xen_set_callback_asserted();
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}
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}
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break;
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}
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}
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int xen_evtchn_set_callback_param(uint64_t param)
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@ -283,15 +310,22 @@ int xen_evtchn_set_callback_param(uint64_t param)
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.u.vector = 0,
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};
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bool in_kernel = false;
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uint32_t gsi = 0;
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int type = param >> CALLBACK_VIA_TYPE_SHIFT;
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int ret;
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if (!s) {
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return -ENOTSUP;
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}
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/*
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* We need the BQL because set_callback_pci_intx() may call into PCI code,
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* and because we may need to manipulate the old and new GSI levels.
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*/
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assert(qemu_mutex_iothread_locked());
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qemu_mutex_lock(&s->port_lock);
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switch (param >> CALLBACK_VIA_TYPE_SHIFT) {
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switch (type) {
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case HVM_PARAM_CALLBACK_TYPE_VECTOR: {
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xa.u.vector = (uint8_t)param,
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@ -299,10 +333,17 @@ int xen_evtchn_set_callback_param(uint64_t param)
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if (!ret && kvm_xen_has_cap(EVTCHN_SEND)) {
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in_kernel = true;
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}
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gsi = 0;
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break;
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}
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case HVM_PARAM_CALLBACK_TYPE_PCI_INTX:
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gsi = set_callback_pci_intx(s, param);
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ret = gsi ? 0 : -EINVAL;
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break;
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case HVM_PARAM_CALLBACK_TYPE_GSI:
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gsi = (uint32_t)param;
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ret = 0;
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break;
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@ -320,6 +361,17 @@ int xen_evtchn_set_callback_param(uint64_t param)
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}
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s->callback_param = param;
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s->evtchn_in_kernel = in_kernel;
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if (gsi != s->callback_gsi) {
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struct vcpu_info *vi = kvm_xen_get_vcpu_info_hva(0);
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xen_evtchn_set_callback_level(0);
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s->callback_gsi = gsi;
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if (gsi && vi && vi->evtchn_upcall_pending) {
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kvm_xen_inject_vcpu_callback_vector(0, type);
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}
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}
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}
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qemu_mutex_unlock(&s->port_lock);
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@ -131,6 +131,38 @@ int kvm_xen_init(KVMState *s, uint32_t hypercall_msr)
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return ret;
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}
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/* If called a second time, don't repeat the rest of the setup. */
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if (s->xen_caps) {
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return 0;
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}
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/*
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* Event channel delivery via GSI/PCI_INTX needs to poll the vcpu_info
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* of vCPU0 to deassert the IRQ when ->evtchn_upcall_pending is cleared.
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*
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* In the kernel, there's a notifier hook on the PIC/IOAPIC which allows
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* such things to be polled at precisely the right time. We *could* do
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* it nicely in the kernel: check vcpu_info[0]->evtchn_upcall_pending at
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* the moment the IRQ is acked, and see if it should be reasserted.
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*
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* But the in-kernel irqchip is deprecated, so we're unlikely to add
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* that support in the kernel. Insist on using the split irqchip mode
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* instead.
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*
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* This leaves us polling for the level going low in QEMU, which lacks
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* the appropriate hooks in its PIC/IOAPIC code. Even VFIO is sending a
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* spurious 'ack' to an INTX IRQ every time there's any MMIO access to
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* the device (for which it has to unmap the device and trap access, for
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* some period after an IRQ!!). In the Xen case, we do it on exit from
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* KVM_RUN, if the flag is set to say that the GSI is currently asserted.
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* Which is kind of icky, but less so than the VFIO one. I may fix them
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* both later...
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*/
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if (!kvm_kernel_irqchip_split()) {
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error_report("kvm: Xen support requires kernel-irqchip=split");
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return -EINVAL;
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}
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s->xen_caps = xen_caps;
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return 0;
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}
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@ -684,7 +716,9 @@ static bool handle_set_param(struct kvm_xen_exit *exit, X86CPU *cpu,
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switch (hp.index) {
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case HVM_PARAM_CALLBACK_IRQ:
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qemu_mutex_lock_iothread();
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err = xen_evtchn_set_callback_param(hp.value);
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qemu_mutex_unlock_iothread();
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xen_set_long_mode(exit->u.hcall.longmode);
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break;
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default:
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