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- Memory: improve error reporting and avoid crashes on hotplug 

- Build: fixing block/iscsi.so and ranlib warnings on Mac OS X
 - Migration fixes for x86
 - The odd KVM patch.
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

- Memory: improve error reporting and avoid crashes on hotplug
- Build: fixing block/iscsi.so and ranlib warnings on Mac OS X
- Migration fixes for x86
- The odd KVM patch.

# gpg: Signature made Thu 11 Sep 2014 11:21:10 BST using RSA key ID 9B4D86F2
# gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>"
# gpg:                 aka "Paolo Bonzini <bonzini@gnu.org>"

* remotes/bonzini/tags/for-upstream: (21 commits)
  gdbstub: init mon_chr through qemu_chr_alloc
  pckbd: adding new fields to vmstate
  mc146818rtc: add missed field to vmstate
  piix: do not set irq while loading vmstate
  serial: fixing vmstate for save/restore
  parallel: adding vmstate for save/restore
  fdc: adding vmstate for save/restore
  cpu: init vmstate for ticks and clock offset
  apic_common: vapic_paddr synchronization fix
  vl: use QLIST_FOREACH_SAFE to visit change state handlers
  exec: add parameter errp to gethugepagesize
  exec: report error when memory < hpagesize
  hostmem-ram: don't exit qemu if size of memory-backend-ram is way too big
  memory: add parameter errp to memory_region_init_rom_device
  memory: add parameter errp to memory_region_init_ram
  exec: add parameter errp to qemu_ram_alloc and qemu_ram_alloc_from_ptr
  rules.mak: Fix DSO build by pulling in archive symbols
  util: Don't link host-utils.o if it's empty
  util: Move general qemu_getauxval to util/getauxval.c
  trace: Only link generated-tracers.o with "simple" backend
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2014-09-12 16:55:48 +01:00
parent 4c24f40040 462efe9e53
commit 2b31cd4e08
97 changed files with 757 additions and 220 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
backends/hostmem-ram.c
View File

@ -27,7 +27,7 @@ ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
path = object_get_canonical_path_component(OBJECT(backend));
memory_region_init_ram(&backend->mr, OBJECT(backend), path,
backend->size);
backend->size, errp);
g_free(path);
}

8
cpus.c
View File

@ -493,13 +493,17 @@ static const VMStateDescription vmstate_timers = {
}
};
void cpu_ticks_init(void)
{
seqlock_init(&timers_state.vm_clock_seqlock, NULL);
vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
}
void configure_icount(QemuOpts *opts, Error **errp)
{
const char *option;
char *rem_str = NULL;
seqlock_init(&timers_state.vm_clock_seqlock, NULL);
vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
option = qemu_opt_get(opts, "shift");
if (!option) {
if (qemu_opt_get(opts, "align") != NULL) {

56
exec.c
View File

@ -1059,7 +1059,7 @@ void qemu_mutex_unlock_ramlist(void)
#define HUGETLBFS_MAGIC 0x958458f6
static long gethugepagesize(const char *path)
static long gethugepagesize(const char *path, Error **errp)
{
struct statfs fs;
int ret;
@ -1069,7 +1069,8 @@ static long gethugepagesize(const char *path)
} while (ret != 0 && errno == EINTR);
if (ret != 0) {
perror(path);
error_setg_errno(errp, errno, "failed to get page size of file %s",
path);
return 0;
}
@ -1087,17 +1088,22 @@ static void *file_ram_alloc(RAMBlock *block,
char *filename;
char *sanitized_name;
char *c;
void *area;
void *area = NULL;
int fd;
unsigned long hpagesize;
uint64_t hpagesize;
Error *local_err = NULL;
hpagesize = gethugepagesize(path);
if (!hpagesize) {
hpagesize = gethugepagesize(path, &local_err);
if (local_err) {
error_propagate(errp, local_err);
goto error;
}
if (memory < hpagesize) {
return NULL;
error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
"or larger than huge page size 0x%" PRIx64,
memory, hpagesize);
goto error;
}
if (kvm_enabled() && !kvm_has_sync_mmu()) {
@ -1287,7 +1293,7 @@ static int memory_try_enable_merging(void *addr, size_t len)
return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
}
static ram_addr_t ram_block_add(RAMBlock *new_block)
static ram_addr_t ram_block_add(RAMBlock *new_block, Error **errp)
{
RAMBlock *block;
ram_addr_t old_ram_size, new_ram_size;
@ -1304,9 +1310,11 @@ static ram_addr_t ram_block_add(RAMBlock *new_block)
} else {
new_block->host = phys_mem_alloc(new_block->length);
if (!new_block->host) {
fprintf(stderr, "Cannot set up guest memory '%s': %s\n",
memory_region_name(new_block->mr), strerror(errno));
exit(1);
error_setg_errno(errp, errno,
"cannot set up guest memory '%s'",
memory_region_name(new_block->mr));
qemu_mutex_unlock_ramlist();
return -1;
}
memory_try_enable_merging(new_block->host, new_block->length);
}
@ -1357,6 +1365,8 @@ ram_addr_t qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
Error **errp)
{
RAMBlock *new_block;
ram_addr_t addr;
Error *local_err = NULL;
if (xen_enabled()) {
error_setg(errp, "-mem-path not supported with Xen");
@ -1386,14 +1396,22 @@ ram_addr_t qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
return -1;
}
return ram_block_add(new_block);
addr = ram_block_add(new_block, &local_err);
if (local_err) {
g_free(new_block);
error_propagate(errp, local_err);
return -1;
}
return addr;
}
#endif
ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
MemoryRegion *mr)
MemoryRegion *mr, Error **errp)
{
RAMBlock *new_block;
ram_addr_t addr;
Error *local_err = NULL;
size = TARGET_PAGE_ALIGN(size);
new_block = g_malloc0(sizeof(*new_block));
@ -1404,12 +1422,18 @@ ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
if (host) {
new_block->flags |= RAM_PREALLOC;
}
return ram_block_add(new_block);
addr = ram_block_add(new_block, &local_err);
if (local_err) {
g_free(new_block);
error_propagate(errp, local_err);
return -1;
}
return addr;
}
ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr)
ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr, Error **errp)
{
return qemu_ram_alloc_from_ptr(size, NULL, mr);
return qemu_ram_alloc_from_ptr(size, NULL, mr, errp);
}
void qemu_ram_free_from_ptr(ram_addr_t addr)

2
gdbstub.c
View File

@ -1707,7 +1707,7 @@ int gdbserver_start(const char *device)
qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
/* Initialize a monitor terminal for gdb */
mon_chr = g_malloc0(sizeof(*mon_chr));
mon_chr = qemu_chr_alloc();
mon_chr->chr_write = gdb_monitor_write;
monitor_init(mon_chr, 0);
} else {

3
hw/alpha/typhoon.c
View File

@ -844,7 +844,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */
memory_region_init_ram(&s->ram_region, OBJECT(s), "ram", ram_size);
memory_region_init_ram(&s->ram_region, OBJECT(s), "ram", ram_size,
&error_abort);
vmstate_register_ram_global(&s->ram_region);
memory_region_add_subregion(addr_space, 0, &s->ram_region);

7
hw/arm/armv7m.c
View File

@ -210,11 +210,12 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory,
#endif
/* Flash programming is done via the SCU, so pretend it is ROM. */
memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size);
memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size,
&error_abort);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(system_memory, 0, flash);
memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size);
memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(system_memory, 0x20000000, sram);
armv7m_bitband_init();
@ -255,7 +256,7 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory,
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000);
memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000, &error_abort);
vmstate_register_ram_global(hack);
memory_region_add_subregion(system_memory, 0xfffff000, hack);

2
hw/arm/cubieboard.c
View File

@ -64,7 +64,7 @@ static void cubieboard_init(MachineState *machine)
}
memory_region_init_ram(&s->sdram, NULL, "cubieboard.ram",
machine->ram_size);
machine->ram_size, &error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE,
&s->sdram);

2
hw/arm/digic_boards.c
View File

@ -51,7 +51,7 @@ typedef struct DigicBoard {
static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size)
{
memory_region_init_ram(&s->ram, NULL, "ram", ram_size);
memory_region_init_ram(&s->ram, NULL, "ram", ram_size, &error_abort);
memory_region_add_subregion(get_system_memory(), 0, &s->ram);
vmstate_register_ram_global(&s->ram);
}

9
hw/arm/exynos4210.c
View File

@ -248,7 +248,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* Internal ROM */
memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom",
EXYNOS4210_IROM_SIZE);
EXYNOS4210_IROM_SIZE, &error_abort);
vmstate_register_ram_global(&s->irom_mem);
memory_region_set_readonly(&s->irom_mem, true);
memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR,
@ -264,7 +264,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* Internal RAM */
memory_region_init_ram(&s->iram_mem, NULL, "exynos4210.iram",
EXYNOS4210_IRAM_SIZE);
EXYNOS4210_IRAM_SIZE, &error_abort);
vmstate_register_ram_global(&s->iram_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR,
&s->iram_mem);
@ -273,13 +273,14 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
mem_size = ram_size;
if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
mem_size - EXYNOS4210_DRAM_MAX_SIZE);
mem_size - EXYNOS4210_DRAM_MAX_SIZE, &error_abort);
vmstate_register_ram_global(&s->dram1_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
&s->dram1_mem);
mem_size = EXYNOS4210_DRAM_MAX_SIZE;
}
memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size);
memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
&error_abort);
vmstate_register_ram_global(&s->dram0_mem);
memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
&s->dram0_mem);

5
hw/arm/highbank.c
View File

@ -255,12 +255,13 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
sysmem = get_system_memory();
dram = g_new(MemoryRegion, 1);
memory_region_init_ram(dram, NULL, "highbank.dram", ram_size);
memory_region_init_ram(dram, NULL, "highbank.dram", ram_size, &error_abort);
/* SDRAM at address zero. */
memory_region_add_subregion(sysmem, 0, dram);
sysram = g_new(MemoryRegion, 1);
memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000);
memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000,
&error_abort);
memory_region_add_subregion(sysmem, 0xfff88000, sysram);
if (bios_name != NULL) {
sysboot_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

5
hw/arm/integratorcp.c
View File

@ -264,7 +264,8 @@ static int integratorcm_init(SysBusDevice *dev)
s->cm_init = 0x00000112;
s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24,
1000);
memory_region_init_ram(&s->flash, OBJECT(s), "integrator.flash", 0x100000);
memory_region_init_ram(&s->flash, OBJECT(s), "integrator.flash", 0x100000,
&error_abort);
vmstate_register_ram_global(&s->flash);
memory_region_init_io(&s->iomem, OBJECT(s), &integratorcm_ops, s,
@ -485,7 +486,7 @@ static void integratorcp_init(MachineState *machine)
exit(1);
}
memory_region_init_ram(ram, NULL, "integrator.ram", ram_size);
memory_region_init_ram(ram, NULL, "integrator.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM should repeat to fill physical memory space. */

4
hw/arm/kzm.c
View File

@ -97,14 +97,14 @@ static void kzm_init(MachineState *machine)
/* On a real system, the first 16k is a `secure boot rom' */
memory_region_init_ram(ram, NULL, "kzm.ram", ram_size);
memory_region_init_ram(ram, NULL, "kzm.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, KZM_RAMADDRESS, ram);
memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size);
memory_region_add_subregion(address_space_mem, 0x88000000, ram_alias);
memory_region_init_ram(sram, NULL, "kzm.sram", 0x4000);
memory_region_init_ram(sram, NULL, "kzm.sram", 0x4000, &error_abort);
memory_region_add_subregion(address_space_mem, 0x1FFFC000, sram);
dev = sysbus_create_varargs("imx_avic", 0x68000000,

3
hw/arm/mainstone.c
View File

@ -123,7 +123,8 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
/* Setup CPU & memory */
mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM,
&error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

6
hw/arm/musicpal.c
View File

@ -1601,11 +1601,13 @@ static void musicpal_init(MachineState *machine)
}
/* For now we use a fixed - the original - RAM size */
memory_region_init_ram(ram, NULL, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
memory_region_init_ram(ram, NULL, "musicpal.ram", MP_RAM_DEFAULT_SIZE,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE);
memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE,
&error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);

6
hw/arm/omap1.c
View File

@ -3854,10 +3854,12 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
omap_clk_init(s);
/* Memory-mapped stuff */
memory_region_init_ram(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size);
memory_region_init_ram(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size,
&error_abort);
vmstate_register_ram_global(&s->emiff_ram);
memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram);
memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size);
memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size,
&error_abort);
vmstate_register_ram_global(&s->imif_ram);
memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram);

6
hw/arm/omap2.c
View File

@ -2266,10 +2266,12 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
omap_clk_init(s);
/* Memory-mapped stuff */
memory_region_init_ram(&s->sdram, NULL, "omap2.dram", s->sdram_size);
memory_region_init_ram(&s->sdram, NULL, "omap2.dram", s->sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram);
memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size);
memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size,
&error_abort);
vmstate_register_ram_global(&s->sram);
memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram);

6
hw/arm/omap_sx1.c
View File

@ -122,7 +122,8 @@ static void sx1_init(MachineState *machine, const int version)
machine->cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size);
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
&error_abort);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
@ -164,7 +165,8 @@ static void sx1_init(MachineState *machine, const int version)
if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size);
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size,
&error_abort);
vmstate_register_ram_global(flash_1);
memory_region_set_readonly(flash_1, true);
memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);

3
hw/arm/palm.c
View File

@ -212,7 +212,8 @@ static void palmte_init(MachineState *machine)
mpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "palmte.flash", flash_size);
memory_region_init_ram(flash, NULL, "palmte.flash", flash_size,
&error_abort);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash);

11
hw/arm/pxa2xx.c
View File

@ -2055,10 +2055,12 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size);
memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000);
memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000,
&error_abort);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);
@ -2186,11 +2188,12 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size);
memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa255.internal",
PXA2XX_INTERNAL_SIZE);
PXA2XX_INTERNAL_SIZE, &error_abort);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);

9
hw/arm/realview.c
View File

@ -137,12 +137,14 @@ static void realview_init(MachineState *machine,
/* Core tile RAM. */
low_ram_size = ram_size - 0x20000000;
ram_size = 0x20000000;
memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size);
memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
&error_abort);
vmstate_register_ram_global(ram_lo);
memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
}
memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size);
memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
&error_abort);
vmstate_register_ram_global(ram_hi);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
@ -337,7 +339,8 @@ static void realview_init(MachineState *machine,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000);
memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
&error_abort);
vmstate_register_ram_global(ram_hack);
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);

2
hw/arm/spitz.c
View File

@ -912,7 +912,7 @@ static void spitz_common_init(MachineState *machine,
sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

3
hw/arm/strongarm.c
View File

@ -1604,7 +1604,8 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
exit(1);
}
memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size);
memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);

2
hw/arm/tosa.c
View File

@ -228,7 +228,7 @@ static void tosa_init(MachineState *machine)
mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM);
memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM, &error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

3
hw/arm/versatilepb.c
View File

@ -198,7 +198,8 @@ static void versatile_init(MachineState *machine, int board_id)
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size);
memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */

15
hw/arm/vexpress.c
View File

@ -252,7 +252,8 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
exit(1);
}
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size,
&error_abort);
vmstate_register_ram_global(ram);
low_ram_size = ram_size;
if (low_ram_size > 0x4000000) {
@ -346,7 +347,8 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
}
}
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size,
&error_abort);
vmstate_register_ram_global(ram);
/* RAM is from 0x80000000 upwards; there is no low-memory alias for it. */
memory_region_add_subregion(sysmem, 0x80000000, ram);
@ -364,7 +366,8 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
/* 0x2b060000: SP805 watchdog: not modelled */
/* 0x2b0a0000: PL341 dynamic memory controller: not modelled */
/* 0x2e000000: system SRAM */
memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000);
memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000,
&error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0x2e000000, sram);
@ -634,12 +637,14 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard,
}
sram_size = 0x2000000;
memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size);
memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size,
&error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, map[VE_SRAM], sram);
vram_size = 0x800000;
memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size);
memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size,
&error_abort);
vmstate_register_ram_global(vram);
memory_region_add_subregion(sysmem, map[VE_VIDEORAM], vram);

3
hw/arm/virt.c
View File

@ -580,7 +580,8 @@ static void machvirt_init(MachineState *machine)
fdt_add_cpu_nodes(vbi);
fdt_add_psci_node(vbi);
memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size);
memory_region_init_ram(ram, NULL, "mach-virt.ram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, vbi->memmap[VIRT_MEM].base, ram);

6
hw/arm/xilinx_zynq.c
View File

@ -149,12 +149,14 @@ static void zynq_init(MachineState *machine)
}
/* DDR remapped to address zero. */
memory_region_init_ram(ext_ram, NULL, "zynq.ext_ram", ram_size);
memory_region_init_ram(ext_ram, NULL, "zynq.ext_ram", ram_size,
&error_abort);
vmstate_register_ram_global(ext_ram);
memory_region_add_subregion(address_space_mem, 0, ext_ram);
/* 256K of on-chip memory */
memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10);
memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10,
&error_abort);
vmstate_register_ram_global(ocm_ram);
memory_region_add_subregion(address_space_mem, 0xFFFC0000, ocm_ram);

74
hw/block/fdc.c
View File

@ -695,10 +695,34 @@ static const VMStateDescription vmstate_fdrive_media_rate = {
}
};
static bool fdrive_perpendicular_needed(void *opaque)
{
FDrive *drive = opaque;
return drive->perpendicular != 0;
}
static const VMStateDescription vmstate_fdrive_perpendicular = {
.name = "fdrive/perpendicular",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT8(perpendicular, FDrive),
VMSTATE_END_OF_LIST()
}
};
static int fdrive_post_load(void *opaque, int version_id)
{
fd_revalidate(opaque);
return 0;
}
static const VMStateDescription vmstate_fdrive = {
.name = "fdrive",
.version_id = 1,
.minimum_version_id = 1,
.post_load = fdrive_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT8(head, FDrive),
VMSTATE_UINT8(track, FDrive),
@ -712,6 +736,9 @@ static const VMStateDescription vmstate_fdrive = {
} , {
.vmsd = &vmstate_fdrive_media_rate,
.needed = &fdrive_media_rate_needed,
} , {
.vmsd = &vmstate_fdrive_perpendicular,
.needed = &fdrive_perpendicular_needed,
} , {
/* empty */
}
@ -734,6 +761,40 @@ static int fdc_post_load(void *opaque, int version_id)
return 0;
}
static bool fdc_reset_sensei_needed(void *opaque)
{
FDCtrl *s = opaque;
return s->reset_sensei != 0;
}
static const VMStateDescription vmstate_fdc_reset_sensei = {
.name = "fdc/reset_sensei",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_INT32(reset_sensei, FDCtrl),
VMSTATE_END_OF_LIST()
}
};
static bool fdc_result_timer_needed(void *opaque)
{
FDCtrl *s = opaque;
return timer_pending(s->result_timer);
}
static const VMStateDescription vmstate_fdc_result_timer = {
.name = "fdc/result_timer",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_TIMER(result_timer, FDCtrl),
VMSTATE_END_OF_LIST()
}
};
static const VMStateDescription vmstate_fdc = {
.name = "fdc",
.version_id = 2,
@ -770,6 +831,17 @@ static const VMStateDescription vmstate_fdc = {
VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
vmstate_fdrive, FDrive),
VMSTATE_END_OF_LIST()
},
.subsections = (VMStateSubsection[]) {
{
.vmsd = &vmstate_fdc_reset_sensei,
.needed = fdc_reset_sensei_needed,
} , {
.vmsd = &vmstate_fdc_result_timer,
.needed = fdc_result_timer_needed,
} , {
/* empty */
}
}
};
@ -844,6 +916,8 @@ static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
fdctrl->dor = FD_DOR_nRESET;
fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
fdctrl->msr = FD_MSR_RQM;
fdctrl->reset_sensei = 0;
timer_del(fdctrl->result_timer);
/* FIFO state */
fdctrl->data_pos = 0;
fdctrl->data_len = 0;

2
hw/block/onenand.c
View File

@ -789,7 +789,7 @@ static int onenand_initfn(SysBusDevice *sbd)
s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT),
0xff, (64 + 2) << PAGE_SHIFT);
memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram",
0xc000 << s->shift);
0xc000 << s->shift, &error_abort);
vmstate_register_ram_global(&s->ram);
ram = memory_region_get_ram_ptr(&s->ram);
s->boot[0] = ram + (0x0000 << s->shift);

8
hw/block/pflash_cfi01.c
View File

@ -753,6 +753,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
int ret;
uint64_t blocks_per_device, device_len;
int num_devices;
Error *local_err = NULL;
total_len = pfl->sector_len * pfl->nb_blocs;
@ -773,7 +774,12 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
memory_region_init_rom_device(
&pfl->mem, OBJECT(dev),
pfl->be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl,
pfl->name, total_len);
pfl->name, total_len, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
vmstate_register_ram(&pfl->mem, DEVICE(pfl));
pfl->storage = memory_region_get_ram_ptr(&pfl->mem);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);

8
hw/block/pflash_cfi02.c
View File

@ -597,6 +597,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
pflash_t *pfl = CFI_PFLASH02(dev);
uint32_t chip_len;
int ret;
Error *local_err = NULL;
chip_len = pfl->sector_len * pfl->nb_blocs;
/* XXX: to be fixed */
@ -608,7 +609,12 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ?
&pflash_cfi02_ops_be : &pflash_cfi02_ops_le,
pfl, pfl->name, chip_len);
pfl, pfl->name, chip_len, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl));
pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem);
pfl->chip_len = chip_len;

18
hw/char/parallel.c
View File

@ -477,6 +477,23 @@ static const MemoryRegionPortio isa_parallel_portio_sw_list[] = {
PORTIO_END_OF_LIST(),
};
static const VMStateDescription vmstate_parallel_isa = {
.name = "parallel_isa",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT8(state.dataw, ISAParallelState),
VMSTATE_UINT8(state.datar, ISAParallelState),
VMSTATE_UINT8(state.status, ISAParallelState),
VMSTATE_UINT8(state.control, ISAParallelState),
VMSTATE_INT32(state.irq_pending, ISAParallelState),
VMSTATE_INT32(state.epp_timeout, ISAParallelState),
VMSTATE_END_OF_LIST()
}
};
static void parallel_isa_realizefn(DeviceState *dev, Error **errp)
{
static int index;
@ -606,6 +623,7 @@ static void parallel_isa_class_initfn(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = parallel_isa_realizefn;
dc->vmsd = &vmstate_parallel_isa;
dc->props = parallel_isa_properties;
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

225
hw/char/serial.c
View File

@ -272,6 +272,36 @@ static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
}
/* Setter for FCR.
is_load flag means, that value is set while loading VM state
and interrupt should not be invoked */
static void serial_write_fcr(SerialState *s, uint8_t val)
{
/* Set fcr - val only has the bits that are supposed to "stick" */
s->fcr = val;
if (val & UART_FCR_FE) {
s->iir |= UART_IIR_FE;
/* Set recv_fifo trigger Level */
switch (val & 0xC0) {
case UART_FCR_ITL_1:
s->recv_fifo_itl = 1;
break;
case UART_FCR_ITL_2:
s->recv_fifo_itl = 4;
break;
case UART_FCR_ITL_3:
s->recv_fifo_itl = 8;
break;
case UART_FCR_ITL_4:
s->recv_fifo_itl = 14;
break;
}
} else {
s->iir &= ~UART_IIR_FE;
}
}
static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
@ -327,20 +357,16 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
}
break;
case 2:
val = val & 0xFF;
if (s->fcr == val)
break;
/* Did the enable/disable flag change? If so, make sure FIFOs get flushed */
if ((val ^ s->fcr) & UART_FCR_FE)
if ((val ^ s->fcr) & UART_FCR_FE) {
val |= UART_FCR_XFR | UART_FCR_RFR;
}
/* FIFO clear */
if (val & UART_FCR_RFR) {
timer_del(s->fifo_timeout_timer);
s->timeout_ipending=0;
s->timeout_ipending = 0;
fifo8_reset(&s->recv_fifo);
}
@ -348,28 +374,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
fifo8_reset(&s->xmit_fifo);
}
if (val & UART_FCR_FE) {
s->iir |= UART_IIR_FE;
/* Set recv_fifo trigger Level */
switch (val & 0xC0) {
case UART_FCR_ITL_1:
s->recv_fifo_itl = 1;
break;
case UART_FCR_ITL_2:
s->recv_fifo_itl = 4;
break;
case UART_FCR_ITL_3:
s->recv_fifo_itl = 8;
break;
case UART_FCR_ITL_4:
s->recv_fifo_itl = 14;
break;
}
} else
s->iir &= ~UART_IIR_FE;
/* Set fcr - or at least the bits in it that are supposed to "stick" */
s->fcr = val & 0xC9;
serial_write_fcr(s, val & 0xC9);
serial_update_irq(s);
break;
case 3:
@ -590,6 +595,14 @@ static void serial_pre_save(void *opaque)
s->fcr_vmstate = s->fcr;
}
static int serial_pre_load(void *opaque)
{
SerialState *s = opaque;
s->thr_ipending = -1;
s->poll_msl = -1;
return 0;
}
static int serial_post_load(void *opaque, int version_id)
{
SerialState *s = opaque;
@ -597,17 +610,139 @@ static int serial_post_load(void *opaque, int version_id)
if (version_id < 3) {
s->fcr_vmstate = 0;
}
if (s->thr_ipending == -1) {
s->thr_ipending = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
}
s->last_break_enable = (s->lcr >> 6) & 1;
/* Initialize fcr via setter to perform essential side-effects */
serial_ioport_write(s, 0x02, s->fcr_vmstate, 1);
serial_write_fcr(s, s->fcr_vmstate);
serial_update_parameters(s);
return 0;
}
static bool serial_thr_ipending_needed(void *opaque)
{
SerialState *s = opaque;
bool expected_value = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
return s->thr_ipending != expected_value;
}
const VMStateDescription vmstate_serial_thr_ipending = {
.name = "serial/thr_ipending",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_INT32(thr_ipending, SerialState),
VMSTATE_END_OF_LIST()
}
};
static bool serial_tsr_needed(void *opaque)
{
SerialState *s = (SerialState *)opaque;
return s->tsr_retry != 0;
}
const VMStateDescription vmstate_serial_tsr = {
.name = "serial/tsr",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_INT32(tsr_retry, SerialState),
VMSTATE_UINT8(thr, SerialState),
VMSTATE_UINT8(tsr, SerialState),
VMSTATE_END_OF_LIST()
}
};
static bool serial_recv_fifo_needed(void *opaque)
{
SerialState *s = (SerialState *)opaque;
return !fifo8_is_empty(&s->recv_fifo);
}
const VMStateDescription vmstate_serial_recv_fifo = {
.name = "serial/recv_fifo",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_STRUCT(recv_fifo, SerialState, 1, vmstate_fifo8, Fifo8),
VMSTATE_END_OF_LIST()
}
};
static bool serial_xmit_fifo_needed(void *opaque)
{
SerialState *s = (SerialState *)opaque;
return !fifo8_is_empty(&s->xmit_fifo);
}
const VMStateDescription vmstate_serial_xmit_fifo = {
.name = "serial/xmit_fifo",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_STRUCT(xmit_fifo, SerialState, 1, vmstate_fifo8, Fifo8),
VMSTATE_END_OF_LIST()
}
};
static bool serial_fifo_timeout_timer_needed(void *opaque)
{
SerialState *s = (SerialState *)opaque;
return timer_pending(s->fifo_timeout_timer);
}
const VMStateDescription vmstate_serial_fifo_timeout_timer = {
.name = "serial/fifo_timeout_timer",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_TIMER(fifo_timeout_timer, SerialState),
VMSTATE_END_OF_LIST()
}
};
static bool serial_timeout_ipending_needed(void *opaque)
{
SerialState *s = (SerialState *)opaque;
return s->timeout_ipending != 0;
}
const VMStateDescription vmstate_serial_timeout_ipending = {
.name = "serial/timeout_ipending",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_INT32(timeout_ipending, SerialState),
VMSTATE_END_OF_LIST()
}
};
static bool serial_poll_needed(void *opaque)
{
SerialState *s = (SerialState *)opaque;
return s->poll_msl >= 0;
}
const VMStateDescription vmstate_serial_poll = {
.name = "serial/poll",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_INT32(poll_msl, SerialState),
VMSTATE_TIMER(modem_status_poll, SerialState),
VMSTATE_END_OF_LIST()
}
};
const VMStateDescription vmstate_serial = {
.name = "serial",
.version_id = 3,
.minimum_version_id = 2,
.pre_save = serial_pre_save,
.pre_load = serial_pre_load,
.post_load = serial_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT16_V(divider, SerialState, 2),
@ -621,6 +756,32 @@ const VMStateDescription vmstate_serial = {
VMSTATE_UINT8(scr, SerialState),
VMSTATE_UINT8_V(fcr_vmstate, SerialState, 3),
VMSTATE_END_OF_LIST()
},
.subsections = (VMStateSubsection[]) {
{
.vmsd = &vmstate_serial_thr_ipending,
.needed = &serial_thr_ipending_needed,
} , {
.vmsd = &vmstate_serial_tsr,
.needed = &serial_tsr_needed,
} , {
.vmsd = &vmstate_serial_recv_fifo,
.needed = &serial_recv_fifo_needed,
} , {
.vmsd = &vmstate_serial_xmit_fifo,
.needed = &serial_xmit_fifo_needed,
} , {
.vmsd = &vmstate_serial_fifo_timeout_timer,
.needed = &serial_fifo_timeout_timer_needed,
} , {
.vmsd = &vmstate_serial_timeout_ipending,
.needed = &serial_timeout_ipending_needed,
} , {
.vmsd = &vmstate_serial_poll,
.needed = &serial_poll_needed,
} , {
/* empty */
}
}
};
@ -642,6 +803,10 @@ static void serial_reset(void *opaque)
s->char_transmit_time = (get_ticks_per_sec() / 9600) * 10;
s->poll_msl = 0;
s->timeout_ipending = 0;
timer_del(s->fifo_timeout_timer);
timer_del(s->modem_status_poll);
fifo8_reset(&s->recv_fifo);
fifo8_reset(&s->xmit_fifo);

2
hw/core/loader.c
View File

@ -701,7 +701,7 @@ static void *rom_set_mr(Rom *rom, Object *owner, const char *name)
void *data;
rom->mr = g_malloc(sizeof(*rom->mr));
memory_region_init_ram(rom->mr, owner, name, rom->datasize);
memory_region_init_ram(rom->mr, owner, name, rom->datasize, &error_abort);
memory_region_set_readonly(rom->mr, true);
vmstate_register_ram_global(rom->mr);

6
hw/cris/axis_dev88.c
View File

@ -270,13 +270,15 @@ void axisdev88_init(MachineState *machine)
env = &cpu->env;
/* allocate RAM */
memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size);
memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE);
memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE,
&error_abort);
vmstate_register_ram_global(phys_intmem);
memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem);

6
hw/display/cg3.c
View File

@ -279,7 +279,8 @@ static void cg3_initfn(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
CG3State *s = CG3(obj);
memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE);
memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE,
&error_abort);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(sbd, &s->rom);
@ -306,7 +307,8 @@ static void cg3_realizefn(DeviceState *dev, Error **errp)
}
}
memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size);
memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size,
&error_abort);
vmstate_register_ram_global(&s->vram_mem);
sysbus_init_mmio(sbd, &s->vram_mem);

6
hw/display/qxl.c
View File

@ -1979,14 +1979,14 @@ static int qxl_init_common(PCIQXLDevice *qxl)
qxl->rom_size = qxl_rom_size();
memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
qxl->rom_size);
qxl->rom_size, &error_abort);
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
qxl->vram_size);
qxl->vram_size, &error_abort);
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
&qxl->vram_bar, 0, qxl->vram32_size);
@ -2095,7 +2095,7 @@ static int qxl_init_secondary(PCIDevice *dev)
qxl->id = device_id++;
qxl_init_ramsize(qxl);
memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram",
qxl->vga.vram_size);
qxl->vga.vram_size, &error_abort);
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl);

2
hw/display/sm501.c
View File

@ -1410,7 +1410,7 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
/* allocate local memory */
memory_region_init_ram(&s->local_mem_region, NULL, "sm501.local",
local_mem_bytes);
local_mem_bytes, &error_abort);
vmstate_register_ram_global(&s->local_mem_region);
s->local_mem = memory_region_get_ram_ptr(&s->local_mem_region);
memory_region_add_subregion(address_space_mem, base, &s->local_mem_region);

3
hw/display/tc6393xb.c
View File

@ -581,7 +581,8 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000);
memory_region_add_subregion(sysmem, base, &s->iomem);
memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000);
memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000,
&error_abort);
vmstate_register_ram_global(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);

5
hw/display/tcx.c
View File

@ -535,7 +535,8 @@ static void tcx_initfn(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
TCXState *s = TCX(obj);
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE);
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE,
&error_abort);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(sbd, &s->rom);
@ -567,7 +568,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp)
char *fcode_filename;
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4));
s->vram_size * (1 + 4 + 4), &error_abort);
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);

3
hw/display/vga.c
View File

@ -2330,7 +2330,8 @@ void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate)
}
s->is_vbe_vmstate = 1;
memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size);
memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size,
&error_abort);
vmstate_register_ram(&s->vram, global_vmstate ? NULL : DEVICE(obj));
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);

3
hw/display/vmware_vga.c
View File

@ -1203,7 +1203,8 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s,
s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s);
s->fifo_size = SVGA_FIFO_SIZE;
memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size);
memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size,
&error_abort);
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);

3
hw/i386/kvm/pci-assign.c
View File

@ -1936,7 +1936,8 @@ static void assigned_dev_load_option_rom(AssignedDevice *dev)
snprintf(name, sizeof(name), "%s.rom",
object_get_typename(OBJECT(dev)));
memory_region_init_ram(&dev->dev.rom, OBJECT(dev), name, st.st_size);
memory_region_init_ram(&dev->dev.rom, OBJECT(dev), name, st.st_size,
&error_abort);
vmstate_register_ram(&dev->dev.rom, &dev->dev.qdev);
ptr = memory_region_get_ram_ptr(&dev->dev.rom);
memset(ptr, 0xff, st.st_size);

37
hw/i386/kvmvapic.c
View File

@ -59,6 +59,7 @@ typedef struct VAPICROMState {
GuestROMState rom_state;
size_t rom_size;
bool rom_mapped_writable;
VMChangeStateEntry *vmsentry;
} VAPICROMState;
#define TYPE_VAPIC "kvmvapic"
@ -734,11 +735,34 @@ static void do_vapic_enable(void *data)
vapic_enable(s, cpu);
}
static int vapic_post_load(void *opaque, int version_id)
static void kvmvapic_vm_state_change(void *opaque, int running,
RunState state)
{
VAPICROMState *s = opaque;
uint8_t *zero;
if (!running) {
return;
}
if (s->state == VAPIC_ACTIVE) {
if (smp_cpus == 1) {
run_on_cpu(first_cpu, do_vapic_enable, s);
} else {
zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_write(s->vapic_paddr, zero,
s->rom_state.vapic_size);
g_free(zero);
}
}
qemu_del_vm_change_state_handler(s->vmsentry);
}
static int vapic_post_load(void *opaque, int version_id)
{
VAPICROMState *s = opaque;
/*
* The old implementation of qemu-kvm did not provide the state
* VAPIC_STANDBY. Reconstruct it.
@ -752,17 +776,8 @@ static int vapic_post_load(void *opaque, int version_id)
return -1;
}
}
if (s->state == VAPIC_ACTIVE) {
if (smp_cpus == 1) {
run_on_cpu(first_cpu, do_vapic_enable, s);
} else {
zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_write(s->vapic_paddr, zero,
s->rom_state.vapic_size);
g_free(zero);
}
}
s->vmsentry = qemu_add_vm_change_state_handler(kvmvapic_vm_state_change, s);
return 0;
}

3
hw/i386/pc.c
View File

@ -1273,7 +1273,8 @@ FWCfgState *pc_memory_init(MachineState *machine,
pc_system_firmware_init(rom_memory, guest_info->isapc_ram_fw);
option_rom_mr = g_malloc(sizeof(*option_rom_mr));
memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE);
memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
&error_abort);
vmstate_register_ram_global(option_rom_mr);
memory_region_add_subregion_overlap(rom_memory,
PC_ROM_MIN_VGA,

5
hw/i386/pc_sysfw.c
View File

@ -55,7 +55,8 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory,
/* map the last 128KB of the BIOS in ISA space */
isa_bios_size = MIN(flash_size, 128 * 1024);
isa_bios = g_malloc(sizeof(*isa_bios));
memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size);
memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size,
&error_abort);
vmstate_register_ram_global(isa_bios);
memory_region_add_subregion_overlap(rom_memory,
0x100000 - isa_bios_size,
@ -192,7 +193,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
goto bios_error;
}
bios = g_malloc(sizeof(*bios));
memory_region_init_ram(bios, NULL, "pc.bios", bios_size);
memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_abort);
vmstate_register_ram_global(bios);
if (!isapc_ram_fw) {
memory_region_set_readonly(bios, true);

4
hw/input/milkymist-softusb.c
View File

@ -250,12 +250,12 @@ static int milkymist_softusb_init(SysBusDevice *dev)
/* register pmem and dmem */
memory_region_init_ram(&s->pmem, OBJECT(s), "milkymist-softusb.pmem",
s->pmem_size);
s->pmem_size, &error_abort);
vmstate_register_ram_global(&s->pmem);
s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem);
sysbus_init_mmio(dev, &s->pmem);
memory_region_init_ram(&s->dmem, OBJECT(s), "milkymist-softusb.dmem",
s->dmem_size);
s->dmem_size, &error_abort);
vmstate_register_ram_global(&s->dmem);
s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem);
sysbus_init_mmio(dev, &s->dmem);

51
hw/input/pckbd.c
View File

@ -131,6 +131,7 @@ typedef struct KBDState {
uint8_t status;
uint8_t mode;
uint8_t outport;
bool outport_present;
/* Bitmask of devices with data available. */
uint8_t pending;
void *kbd;
@ -367,18 +368,68 @@ static void kbd_reset(void *opaque)
s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
s->outport = KBD_OUT_RESET | KBD_OUT_A20;
s->outport_present = false;
}
static uint8_t kbd_outport_default(KBDState *s)
{
return KBD_OUT_RESET | KBD_OUT_A20
| (s->status & KBD_STAT_OBF ? KBD_OUT_OBF : 0)
| (s->status & KBD_STAT_MOUSE_OBF ? KBD_OUT_MOUSE_OBF : 0);
}
static int kbd_outport_post_load(void *opaque, int version_id)
{
KBDState *s = opaque;
s->outport_present = true;
return 0;
}
static const VMStateDescription vmstate_kbd_outport = {
.name = "pckbd_outport",
.version_id = 1,
.minimum_version_id = 1,
.post_load = kbd_outport_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT8(outport, KBDState),
VMSTATE_END_OF_LIST()
}
};
static bool kbd_outport_needed(void *opaque)
{
KBDState *s = opaque;
return s->outport != kbd_outport_default(s);
}
static int kbd_post_load(void *opaque, int version_id)
{
KBDState *s = opaque;
if (!s->outport_present) {
s->outport = kbd_outport_default(s);
}
s->outport_present = false;
return 0;
}
static const VMStateDescription vmstate_kbd = {
.name = "pckbd",
.version_id = 3,
.minimum_version_id = 3,
.post_load = kbd_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT8(write_cmd, KBDState),
VMSTATE_UINT8(status, KBDState),
VMSTATE_UINT8(mode, KBDState),
VMSTATE_UINT8(pending, KBDState),
VMSTATE_END_OF_LIST()
},
.subsections = (VMStateSubsection[]) {
{
.vmsd = &vmstate_kbd_outport,
.needed = kbd_outport_needed,
},
VMSTATE_END_OF_LIST()
}
};

6
hw/lm32/lm32_boards.c
View File

@ -111,7 +111,8 @@ static void lm32_evr_init(MachineState *machine)
reset_info->flash_base = flash_base;
memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size);
memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
@ -213,7 +214,8 @@ static void lm32_uclinux_init(MachineState *machine)
reset_info->flash_base = flash_base;
memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size);
memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);

3
hw/lm32/milkymist.c
View File

@ -118,7 +118,8 @@ milkymist_init(MachineState *machine)
cpu_lm32_set_phys_msb_ignore(env, 1);
memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size);
memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size,
&error_abort);
vmstate_register_ram_global(phys_sdram);
memory_region_add_subregion(address_space_mem, sdram_base, phys_sdram);

4
hw/m68k/an5206.c
View File

@ -50,12 +50,12 @@ static void an5206_init(MachineState *machine)
env->rambar0 = AN5206_RAMBAR_ADDR | 1;
/* DRAM at address zero */
memory_region_init_ram(ram, NULL, "an5206.ram", ram_size);
memory_region_init_ram(ram, NULL, "an5206.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
/* Internal SRAM. */
memory_region_init_ram(sram, NULL, "an5206.sram", 512);
memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);

2
hw/m68k/dummy_m68k.c
View File

@ -40,7 +40,7 @@ static void dummy_m68k_init(MachineState *machine)
env->vbr = 0;
/* RAM at address zero */
memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size);
memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);

4
hw/m68k/mcf5208.c
View File

@ -218,12 +218,12 @@ static void mcf5208evb_init(MachineState *machine)
/* TODO: Configure BARs. */
/* DRAM at 0x40000000 */
memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size);
memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Internal SRAM. */
memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384);
memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, 0x80000000, sram);

5
hw/microblaze/petalogix_ml605_mmu.c
View File

@ -99,11 +99,12 @@ petalogix_ml605_init(MachineState *machine)
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
LMB_BRAM_SIZE);
LMB_BRAM_SIZE, &error_abort);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size);
memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size,
&error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, MEMORY_BASEADDR, phys_ram);

6
hw/microblaze/petalogix_s3adsp1800_mmu.c
View File

@ -81,11 +81,13 @@ petalogix_s3adsp1800_init(MachineState *machine)
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL,
"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE);
"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
&error_abort);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram", ram_size);
memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
ram_size, &error_abort);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(sysmem, ddr_base, phys_ram);

5
hw/mips/mips_fulong2e.c
View File

@ -302,9 +302,10 @@ static void mips_fulong2e_init(MachineState *machine)
bios_size = 1024 * 1024;
/* allocate RAM */
memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size);
memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size);
memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);

8
hw/mips/mips_jazz.c
View File

@ -179,11 +179,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
cc->do_unassigned_access = mips_jazz_do_unassigned_access;
/* allocate RAM */
memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, 0, ram);
memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios,
@ -244,7 +245,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
{
/* Simple ROM, so user doesn't have to provide one */
MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000);
memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000,
&error_abort);
vmstate_register_ram_global(rom_mr);
memory_region_set_readonly(rom_mr, true);
uint8_t *rom = memory_region_get_ram_ptr(rom_mr);

6
hw/mips/mips_malta.c
View File

@ -992,7 +992,8 @@ void mips_malta_init(MachineState *machine)
}
/* register RAM at high address where it is undisturbed by IO */
memory_region_init_ram(ram_high, NULL, "mips_malta.ram", ram_size);
memory_region_init_ram(ram_high, NULL, "mips_malta.ram", ram_size,
&error_abort);
vmstate_register_ram_global(ram_high);
memory_region_add_subregion(system_memory, 0x80000000, ram_high);
@ -1116,7 +1117,8 @@ void mips_malta_init(MachineState *machine)
* handled by an overlapping region as the resulting ROM code subpage
* regions are not executable.
*/
memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE);
memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE,
&error_abort);
if (!rom_copy(memory_region_get_ram_ptr(bios_copy),
FLASH_ADDRESS, BIOS_SIZE)) {
memcpy(memory_region_get_ram_ptr(bios_copy),

6
hw/mips/mips_mipssim.c
View File

@ -171,9 +171,11 @@ mips_mipssim_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size);
memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);

5
hw/mips/mips_r4k.c
View File

@ -204,7 +204,7 @@ void mips_r4k_init(MachineState *machine)
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
@ -231,7 +231,8 @@ void mips_r4k_init(MachineState *machine)
#endif
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);

4
hw/moxie/moxiesim.c
View File

@ -123,11 +123,11 @@ static void moxiesim_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, cpu);
/* Allocate RAM. */
memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size);
memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, ram_base, ram);
memory_region_init_ram(rom, NULL, "moxie.rom", 128*0x1000);
memory_region_init_ram(rom, NULL, "moxie.rom", 128*0x1000, &error_abort);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0x1000, rom);

2
hw/net/milkymist-minimac2.c
View File

@ -472,7 +472,7 @@ static int milkymist_minimac2_init(SysBusDevice *sbd)
/* register buffers memory */
memory_region_init_ram(&s->buffers, OBJECT(dev), "milkymist-minimac2.buffers",
buffers_size);
buffers_size, &error_abort);
vmstate_register_ram_global(&s->buffers);
s->rx0_buf = memory_region_get_ram_ptr(&s->buffers);
s->rx1_buf = s->rx0_buf + MINIMAC2_BUFFER_SIZE;

2
hw/openrisc/openrisc_sim.c
View File

@ -114,7 +114,7 @@ static void openrisc_sim_init(MachineState *machine)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size);
memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);

30
hw/pci-host/piix.c
View File

@ -409,7 +409,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
(pic_irq * PIIX_NUM_PIRQS))));
}
static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level)
static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level)
{
int pic_irq;
uint64_t mask;
@ -422,6 +422,18 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level)
mask = 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq);
piix3->pic_levels &= ~mask;
piix3->pic_levels |= mask * !!level;
}
static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level)
{
int pic_irq;
pic_irq = piix3->dev.config[PIIX_PIRQC + pirq];
if (pic_irq >= PIIX_NUM_PIC_IRQS) {
return;
}
piix3_set_irq_level_internal(piix3, pirq, level);
piix3_set_irq_pic(piix3, pic_irq);
}
@ -527,7 +539,21 @@ static void piix3_reset(void *opaque)
static int piix3_post_load(void *opaque, int version_id)
{
PIIX3State *piix3 = opaque;
piix3_update_irq_levels(piix3);
int pirq;
/* Because the i8259 has not been deserialized yet, qemu_irq_raise
* might bring the system to a different state than the saved one;
* for example, the interrupt could be masked but the i8259 would
* not know that yet and would trigger an interrupt in the CPU.
*
* Here, we update irq levels without raising the interrupt.
* Interrupt state will be deserialized separately through the i8259.
*/
piix3->pic_levels = 0;
for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
piix3_set_irq_level_internal(piix3, pirq,
pci_bus_get_irq_level(piix3->dev.bus, pirq));
}
return 0;
}

3
hw/pci-host/prep.c
View File

@ -299,7 +299,8 @@ static int raven_init(PCIDevice *d)
d->config[0x0D] = 0x10; // latency_timer
d->config[0x34] = 0x00; // capabilities_pointer
memory_region_init_ram(&s->bios, OBJECT(s), "bios", BIOS_SIZE);
memory_region_init_ram(&s->bios, OBJECT(s), "bios", BIOS_SIZE,
&error_abort);
memory_region_set_readonly(&s->bios, true);
memory_region_add_subregion(get_system_memory(), (uint32_t)(-BIOS_SIZE),
&s->bios);

2
hw/pci/pci.c
View File

@ -1974,7 +1974,7 @@ static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom)
snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev)));
}
pdev->has_rom = true;
memory_region_init_ram(&pdev->rom, OBJECT(pdev), name, size);
memory_region_init_ram(&pdev->rom, OBJECT(pdev), name, size, &error_abort);
vmstate_register_ram(&pdev->rom, &pdev->qdev);
ptr = memory_region_get_ram_ptr(&pdev->rom);
load_image(path, ptr);

3
hw/ppc/mac_newworld.c
View File

@ -206,7 +206,8 @@ static void ppc_core99_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
if (bios_name == NULL)

3
hw/ppc/mac_oldworld.c
View File

@ -136,7 +136,8 @@ static void ppc_heathrow_init(MachineState *machine)
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
if (bios_name == NULL)

8
hw/ppc/ppc405_boards.c
View File

@ -214,7 +214,7 @@ static void ref405ep_init(MachineState *machine)
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size);
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size, &error_abort);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
/* allocate and load BIOS */
@ -246,7 +246,8 @@ static void ref405ep_init(MachineState *machine)
printf("Load BIOS from file\n");
#endif
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
@ -572,7 +573,8 @@ static void taihu_405ep_init(MachineState *machine)
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE);
memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {

3
hw/ppc/ppc405_uc.c
View File

@ -974,7 +974,8 @@ static void ppc405_ocm_init(CPUPPCState *env)
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096);
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096,
&error_abort);
vmstate_register_ram_global(&ocm->isarc_ram);
memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram,
0, 4096);

2
hw/s390x/s390-virtio-ccw.c
View File

@ -131,7 +131,7 @@ static void ccw_init(MachineState *machine)
virtio_ccw_register_hcalls();
/* allocate RAM for core */
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);

2
hw/s390x/s390-virtio.c
View File

@ -260,7 +260,7 @@ static void s390_init(MachineState *machine)
s390_virtio_register_hcalls();
/* allocate RAM */
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);

2
hw/s390x/sclp.c
View File

@ -239,7 +239,7 @@ static void assign_storage(SCCB *sccb)
this_subregion_size = mhd->standby_subregion_size;
}
memory_region_init_ram(standby_ram, NULL, id, this_subregion_size);
memory_region_init_ram(standby_ram, NULL, id, this_subregion_size, &error_abort);
vmstate_register_ram_global(standby_ram);
memory_region_add_subregion(sysmem, offset, standby_ram);
}

2
hw/sh4/r2d.c
View File

@ -255,7 +255,7 @@ static void r2d_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate memory space */
memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE);
memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_abort);
vmstate_register_ram_global(sdram);
memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
/* Register peripherals */

8
hw/sh4/shix.c
View File

@ -59,14 +59,16 @@ static void shix_init(MachineState *machine)
}
/* Allocate memory space */
memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_abort);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(sysmem, 0x00000000, rom);
memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000,
&error_abort);
vmstate_register_ram_global(&sdram[0]);
memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000,
&error_abort);
vmstate_register_ram_global(&sdram[1]);
memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);

4
hw/sparc/leon3.c
View File

@ -151,13 +151,13 @@ static void leon3_generic_hw_init(MachineState *machine)
exit(1);
}
memory_region_init_ram(ram, NULL, "leon3.ram", ram_size);
memory_region_init_ram(ram, NULL, "leon3.ram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Allocate BIOS */
prom_size = 8 * 1024 * 1024; /* 8Mb */
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size);
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_abort);
vmstate_register_ram_global(prom);
memory_region_set_readonly(prom, true);
memory_region_add_subregion(address_space_mem, 0x00000000, prom);

10
hw/sparc/sun4m.c
View File

@ -621,7 +621,7 @@ static int idreg_init1(SysBusDevice *dev)
IDRegState *s = MACIO_ID_REGISTER(dev);
memory_region_init_ram(&s->mem, OBJECT(s),
"sun4m.idreg", sizeof(idreg_data));
"sun4m.idreg", sizeof(idreg_data), &error_abort);
vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem);
@ -668,7 +668,7 @@ static int afx_init1(SysBusDevice *dev)
{
AFXState *s = TCX_AFX(dev);
memory_region_init_ram(&s->mem, OBJECT(s), "sun4m.afx", 4);
memory_region_init_ram(&s->mem, OBJECT(s), "sun4m.afx", 4, &error_abort);
vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem);
return 0;
@ -742,7 +742,8 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = OPENPROM(dev);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4m.prom", PROM_SIZE_MAX);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4m.prom", PROM_SIZE_MAX,
&error_abort);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@ -784,7 +785,8 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = SUN4M_RAM(dev);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4m.ram", d->size);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4m.ram", d->size,
&error_abort);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;

6
hw/sparc64/sun4u.c
View File

@ -686,7 +686,8 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = OPENPROM(dev);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4u.prom", PROM_SIZE_MAX);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4u.prom", PROM_SIZE_MAX,
&error_abort);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
@ -729,7 +730,8 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = SUN4U_RAM(dev);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4u.ram", d->size);
memory_region_init_ram(&d->ram, OBJECT(d), "sun4u.ram", d->size,
&error_abort);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;

24
hw/timer/mc146818rtc.c
View File

@ -733,6 +733,22 @@ static int rtc_post_load(void *opaque, int version_id)
return 0;
}
static const VMStateDescription vmstate_rtc_irq_reinject_on_ack_count = {
.name = "irq_reinject_on_ack_count",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT16(irq_reinject_on_ack_count, RTCState),
VMSTATE_END_OF_LIST()
}
};
static bool rtc_irq_reinject_on_ack_count_needed(void *opaque)
{
RTCState *s = (RTCState *)opaque;
return s->irq_reinject_on_ack_count != 0;
}
static const VMStateDescription vmstate_rtc = {
.name = "mc146818rtc",
.version_id = 3,
@ -753,6 +769,14 @@ static const VMStateDescription vmstate_rtc = {
VMSTATE_TIMER_V(update_timer, RTCState, 3),
VMSTATE_UINT64_V(next_alarm_time, RTCState, 3),
VMSTATE_END_OF_LIST()
},
.subsections = (VMStateSubsection[]) {
{
.vmsd = &vmstate_rtc_irq_reinject_on_ack_count,
.needed = rtc_irq_reinject_on_ack_count_needed,
}, {
/* empty */
}
}
};

12
hw/tricore/tricore_testboard.c
View File

@ -76,17 +76,17 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
error_report("Unable to find CPU definition");
exit(1);
}
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024);
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024, &error_abort);
vmstate_register_ram_global(ext_cram);
memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024);
memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024, &error_abort);
vmstate_register_ram_global(ext_dram);
memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48*1024);
memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48*1024, &error_abort);
vmstate_register_ram_global(int_cram);
memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48*1024);
memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48*1024, &error_abort);
vmstate_register_ram_global(int_dram);
memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024);
memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024, &error_abort);
vmstate_register_ram_global(pcp_data);
memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024);
memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024, &error_abort);
vmstate_register_ram_global(pcp_text);
memory_region_add_subregion(sysmem, 0x80000000, ext_cram);

3
hw/unicore32/puv3.c
View File

@ -74,7 +74,8 @@ static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size)
MemoryRegion *ram_memory = g_new(MemoryRegion, 1);
/* SDRAM at address zero. */
memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size);
memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size,
&error_abort);
vmstate_register_ram_global(ram_memory);
memory_region_add_subregion(get_system_memory(), 0, ram_memory);
}

4
hw/xtensa/sim.c
View File

@ -79,12 +79,12 @@ static void xtensa_sim_init(MachineState *machine)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size);
memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000);
memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000, &error_abort);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);

8
hw/xtensa/xtfpga.c
View File

@ -143,7 +143,7 @@ static void lx60_net_init(MemoryRegion *address_space,
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384);
memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, &error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
}
@ -205,7 +205,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size);
memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
@ -254,7 +255,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size);
memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,
&error_abort);
vmstate_register_ram_global(rom);
memory_region_add_subregion(system_memory, 0xfe000000, rom);

8
include/exec/memory.h
View File

@ -311,11 +311,13 @@ void memory_region_init_io(MemoryRegion *mr,
* @owner: the object that tracks the region's reference count
* @name: the name of the region.
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
*/
void memory_region_init_ram(MemoryRegion *mr,
struct Object *owner,
const char *name,
uint64_t size);
uint64_t size,
Error **errp);
#ifdef __linux__
/**
@ -384,13 +386,15 @@ void memory_region_init_alias(MemoryRegion *mr,
* @ops: callbacks for write access handling.
* @name: the name of the region.
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
*/
void memory_region_init_rom_device(MemoryRegion *mr,
struct Object *owner,
const MemoryRegionOps *ops,
void *opaque,
const char *name,
uint64_t size);
uint64_t size,
Error **errp);
/**
* memory_region_init_reservation: Initialize a memory region that reserves

4
include/exec/ram_addr.h
View File

@ -26,8 +26,8 @@ ram_addr_t qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
bool share, const char *mem_path,
Error **errp);
ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
MemoryRegion *mr);
ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr);
MemoryRegion *mr, Error **errp);
ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr, Error **errp);
int qemu_get_ram_fd(ram_addr_t addr);
void *qemu_get_ram_block_host_ptr(ram_addr_t addr);
void *qemu_get_ram_ptr(ram_addr_t addr);

2
include/qemu-common.h
View File

@ -105,6 +105,8 @@ static inline char *realpath(const char *path, char *resolved_path)
}
#endif
void cpu_ticks_init(void);
/* icount */
void configure_icount(QemuOpts *opts, Error **errp);
extern int use_icount;

4
include/qemu/osdep.h
View File

@ -246,11 +246,7 @@ char *qemu_get_exec_dir(void);
* Search the auxiliary vector for @type, returning the value
* or 0 if @type is not present.
*/
#if defined(CONFIG_GETAUXVAL) || defined(__linux__)
unsigned long qemu_getauxval(unsigned long type);
#else
static inline unsigned long qemu_getauxval(unsigned long type) { return 0; }
#endif
void qemu_set_tty_echo(int fd, bool echo);

3
kvm-all.c
View File

@ -1751,7 +1751,8 @@ int kvm_cpu_exec(CPUState *cpu)
}
fprintf(stderr, "error: kvm run failed %s\n",
strerror(-run_ret));
abort();
ret = -1;
break;
}
trace_kvm_run_exit(cpu->cpu_index, run->exit_reason);

15
memory.c
View File

@ -1142,13 +1142,14 @@ void memory_region_init_io(MemoryRegion *mr,
void memory_region_init_ram(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size)
uint64_t size,
Error **errp)
{
memory_region_init(mr, owner, name, size);
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram;
mr->ram_addr = qemu_ram_alloc(size, mr);
mr->ram_addr = qemu_ram_alloc(size, mr, errp);
}
#ifdef __linux__
@ -1178,7 +1179,10 @@ void memory_region_init_ram_ptr(MemoryRegion *mr,
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram_from_ptr;
mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
/* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
assert(ptr != NULL);
mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
}
void memory_region_init_alias(MemoryRegion *mr,
@ -1200,7 +1204,8 @@ void memory_region_init_rom_device(MemoryRegion *mr,
const MemoryRegionOps *ops,
void *opaque,
const char *name,
uint64_t size)
uint64_t size,
Error **errp)
{
memory_region_init(mr, owner, name, size);
mr->ops = ops;
@ -1208,7 +1213,7 @@ void memory_region_init_rom_device(MemoryRegion *mr,
mr->terminates = true;
mr->rom_device = true;
mr->destructor = memory_region_destructor_rom_device;
mr->ram_addr = qemu_ram_alloc(size, mr);
mr->ram_addr = qemu_ram_alloc(size, mr, errp);
}
void memory_region_init_iommu(MemoryRegion *mr,

4
numa.c
View File

@ -263,14 +263,14 @@ static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
if (err) {
qerror_report_err(err);
error_free(err);
memory_region_init_ram(mr, owner, name, ram_size);
memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
}
#else
fprintf(stderr, "-mem-path not supported on this host\n");
exit(1);
#endif
} else {
memory_region_init_ram(mr, owner, name, ram_size);
memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
}
vmstate_register_ram_global(mr);
}

43
rules.mak
View File

@ -22,6 +22,32 @@ QEMU_DGFLAGS += -MMD -MP -MT $@ -MF $(*D)/$(*F).d
# Same as -I$(SRC_PATH) -I., but for the nested source/object directories
QEMU_INCLUDES += -I$(<D) -I$(@D)
WL_U := -Wl,-u,
find-symbols = $(if $1, $(sort $(shell nm -P -g $1 | $2)))
defined-symbols = $(call find-symbols,$1,awk '$$2!="U"{print $$1}')
undefined-symbols = $(call find-symbols,$1,awk '$$2=="U"{print $$1}')
# All the .mo objects in -m variables are also added into corresponding -y
# variable in unnest-vars, but filtered out here, when LINK is called.
#
# The .mo objects are supposed to be linked as a DSO, for module build. So here
# they are only used as a placeholders to generate those "archive undefined"
# symbol options (-Wl,-u,$symbol_name), which are the archive functions
# referenced by the code in the DSO.
#
# Also the presence in -y variables will also guarantee they are built before
# linking executables that will load them. So we can look up symbol reference
# in LINK.
#
# This is necessary because the exectuable itself may not use the function, in
# which case the function would not be linked in. Then the DSO loading will
# fail because of the missing symbol.
process-archive-undefs = $(filter-out %.a %.mo,$1) \
$(addprefix $(WL_U), \
$(filter $(call defined-symbols,$(filter %.a, $1)), \
$(call undefined-symbols,$(filter %.mo,$1)))) \
$(filter %.a,$1)
extract-libs = $(strip $(foreach o,$1,$($o-libs)))
expand-objs = $(strip $(sort $(filter %.o,$1)) \
$(foreach o,$(filter %.mo,$1),$($o-objs)) \
@ -38,7 +64,8 @@ LINKPROG = $(or $(CXX),$(CC))
ifeq ($(LIBTOOL),)
LINK = $(call quiet-command, $(LINKPROG) $(QEMU_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ \
$1 $(version-obj-y) $(call extract-libs,$1) $(LIBS)," LINK $(TARGET_DIR)$@")
$(call process-archive-undefs, $1) \
$(version-obj-y) $(call extract-libs,$1) $(LIBS)," LINK $(TARGET_DIR)$@")
else
LIBTOOL += $(if $(V),,--quiet)
%.lo: %.c
@ -50,7 +77,8 @@ LIBTOOL += $(if $(V),,--quiet)
LINK = $(call quiet-command,\
$(if $(filter %.lo %.la,$1),$(LIBTOOL) --mode=link --tag=CC \
)$(LINKPROG) $(QEMU_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $1 \
)$(LINKPROG) $(QEMU_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ \
$(call process-archive-undefs, $1)\
$(if $(filter %.lo %.la,$1),$(version-lobj-y),$(version-obj-y)) \
$(if $(filter %.lo %.la,$1),$(LIBTOOLFLAGS)) \
$(call extract-libs,$(1:.lo=.o)) $(LIBS),$(if $(filter %.lo %.la,$1),"lt LINK ", " LINK ")"$(TARGET_DIR)$@")
@ -76,11 +104,17 @@ endif
%$(DSOSUF): CFLAGS += -fPIC -DBUILD_DSO
%$(DSOSUF): LDFLAGS += $(LDFLAGS_SHARED)
%$(DSOSUF):
%$(DSOSUF): %.mo
$(call LINK,$^)
@# Copy to build root so modules can be loaded when program started without install
$(if $(findstring /,$@),$(call quiet-command,cp $@ $(subst /,-,$@), " CP $(subst /,-,$@)"))
LD_REL := $(CC) -nostdlib -Wl,-r
%.mo:
$(call quiet-command,$(LD_REL) -o $@ $^," LD -r $(TARGET_DIR)$@")
.PHONY: modules
modules:
@ -306,6 +340,9 @@ define unnest-vars
# For module build, build shared libraries during "make modules"
# For non-module build, add -m to -y
$(if $(CONFIG_MODULES),
$(foreach o,$($v),
$(eval $o: $($o-objs)))
$(eval $(patsubst %-m,%-y,$v) += $($v))
$(eval modules: $($v:%.mo=%$(DSOSUF))),
$(eval $(patsubst %-m,%-y,$v) += $(call expand-objs, $($v)))))

3
trace/Makefile.objs
View File

@ -140,8 +140,7 @@ $(obj)/generated-tcg-tracers.h-timestamp: $(SRC_PATH)/trace-events $(BUILD_DIR)/
######################################################################
# Backend code
util-obj-$(CONFIG_TRACE_SIMPLE) += simple.o
util-obj-$(CONFIG_TRACE_SIMPLE) += simple.o generated-tracers.o
util-obj-$(CONFIG_TRACE_FTRACE) += ftrace.o
util-obj-$(CONFIG_TRACE_UST) += generated-ust.o
util-obj-y += control.o
util-obj-y += generated-tracers.o

3
util/Makefile.objs
View File

@ -1,7 +1,8 @@
util-obj-y = osdep.o cutils.o unicode.o qemu-timer-common.o
util-obj-$(CONFIG_WIN32) += oslib-win32.o qemu-thread-win32.o event_notifier-win32.o
util-obj-$(CONFIG_POSIX) += oslib-posix.o qemu-thread-posix.o event_notifier-posix.o qemu-openpty.o
util-obj-y += envlist.o path.o host-utils.o module.o
util-obj-y += envlist.o path.o module.o
util-obj-$(call lnot,$(CONFIG_INT128)) += host-utils.o
util-obj-y += bitmap.o bitops.o hbitmap.o
util-obj-y += fifo8.o
util-obj-y += acl.o

8
util/getauxval.c
View File

@ -98,4 +98,12 @@ unsigned long qemu_getauxval(unsigned long type)
return 0;
}
#else
unsigned long qemu_getauxval(unsigned long type)
{
return 0;
}
#endif

2
util/host-utils.c
View File

@ -28,7 +28,6 @@
#include "qemu/host-utils.h"
/* Long integer helpers */
#ifndef CONFIG_INT128
static inline void mul64(uint64_t *plow, uint64_t *phigh,
uint64_t a, uint64_t b)
{
@ -161,4 +160,3 @@ int divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
return overflow;
}
#endif /* !CONFIG_INT128 */

5
vl.c
View File

@ -1721,11 +1721,11 @@ void qemu_del_vm_change_state_handler(VMChangeStateEntry *e)
void vm_state_notify(int running, RunState state)
{
VMChangeStateEntry *e;
VMChangeStateEntry *e, *next;
trace_vm_state_notify(running, state);
for (e = vm_change_state_head.lh_first; e; e = e->entries.le_next) {
QLIST_FOREACH_SAFE(e, &vm_change_state_head, entries, next) {
e->cb(e->opaque, running, state);
}
}
@ -4334,6 +4334,7 @@ int main(int argc, char **argv, char **envp)
qemu_spice_init();
#endif
cpu_ticks_init();
if (icount_opts) {
if (kvm_enabled() || xen_enabled()) {
fprintf(stderr, "-icount is not allowed with kvm or xen\n");

3
xen-hvm.c
View File

@ -188,7 +188,8 @@ static void xen_ram_init(ram_addr_t *below_4g_mem_size,
*/
block_len = (1ULL << 32) + *above_4g_mem_size;
}
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len);
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
&error_abort);
*ram_memory_p = &ram_memory;
vmstate_register_ram_global(&ram_memory);