ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages
This definition is backward compatible with MAV=1.0 as long as the guest does not set reserved bits in MAS1/MAS4. Also, fix the shift in booke206_tlb_to_page_size -- it's the base that should be able to hold a 4G page size, not the shift count. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
parent
bebabbc7aa
commit
2bd9543cd3
@ -174,7 +174,7 @@ out:
|
|||||||
/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
|
/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
|
||||||
static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
|
static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
|
||||||
{
|
{
|
||||||
return (ffs(size >> 10) - 1) >> 1;
|
return ffs(size >> 10) - 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mmubooke_create_initial_mapping(CPUState *env,
|
static void mmubooke_create_initial_mapping(CPUState *env,
|
||||||
|
@ -667,8 +667,8 @@ enum {
|
|||||||
#define MAS0_ATSEL_TLB 0
|
#define MAS0_ATSEL_TLB 0
|
||||||
#define MAS0_ATSEL_LRAT MAS0_ATSEL
|
#define MAS0_ATSEL_LRAT MAS0_ATSEL
|
||||||
|
|
||||||
#define MAS1_TSIZE_SHIFT 8
|
#define MAS1_TSIZE_SHIFT 7
|
||||||
#define MAS1_TSIZE_MASK (0xf << MAS1_TSIZE_SHIFT)
|
#define MAS1_TSIZE_MASK (0x1f << MAS1_TSIZE_SHIFT)
|
||||||
|
|
||||||
#define MAS1_TS_SHIFT 12
|
#define MAS1_TS_SHIFT 12
|
||||||
#define MAS1_TS (1 << MAS1_TS_SHIFT)
|
#define MAS1_TS (1 << MAS1_TS_SHIFT)
|
||||||
|
@ -1293,7 +1293,7 @@ target_phys_addr_t booke206_tlb_to_page_size(CPUState *env, ppcmas_tlb_t *tlb)
|
|||||||
{
|
{
|
||||||
uint32_t tlbncfg;
|
uint32_t tlbncfg;
|
||||||
int tlbn = booke206_tlbm_to_tlbn(env, tlb);
|
int tlbn = booke206_tlbm_to_tlbn(env, tlb);
|
||||||
target_phys_addr_t tlbm_size;
|
int tlbm_size;
|
||||||
|
|
||||||
tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
|
tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
|
||||||
|
|
||||||
@ -1301,9 +1301,10 @@ target_phys_addr_t booke206_tlb_to_page_size(CPUState *env, ppcmas_tlb_t *tlb)
|
|||||||
tlbm_size = (tlb->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
|
tlbm_size = (tlb->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
|
||||||
} else {
|
} else {
|
||||||
tlbm_size = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT;
|
tlbm_size = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT;
|
||||||
|
tlbm_size <<= 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
return (1 << (tlbm_size << 1)) << 10;
|
return 1024ULL << tlbm_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* TLB check function for MAS based SoftTLBs */
|
/* TLB check function for MAS based SoftTLBs */
|
||||||
|
Loading…
Reference in New Issue
Block a user