target-ppc: IBM PowerPC 440EP Bamboo reference board emulation
Since most IO devices are integrated into the 440EP chip, "Bamboo support" mostly entails implementing the -kernel, -initrd, and -append options. These options are implemented by loading the guest as if u-boot had done it, i.e. loading a flat device tree, updating it to hold initrd addresses, ram size, and command line, and passing the FDT address in r3. Since we use it with KVM, we enable the virtio block driver and include hooks necessary for KVM support. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6067 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32
parent
75dd595b2e
commit
2c9fade200
2
Makefile
2
Makefile
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@ -222,7 +222,7 @@ common de-ch es fo fr-ca hu ja mk nl-be pt sl tr
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ifdef INSTALL_BLOBS
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BLOBS=bios.bin vgabios.bin vgabios-cirrus.bin ppc_rom.bin \
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video.x openbios-sparc32 openbios-sparc64 pxe-ne2k_pci.bin \
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pxe-rtl8139.bin pxe-pcnet.bin pxe-e1000.bin
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pxe-rtl8139.bin pxe-pcnet.bin pxe-e1000.bin bamboo.dtb
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else
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BLOBS=
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endif
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@ -655,7 +655,7 @@ OBJS+= heathrow_pic.o grackle_pci.o ppc_oldworld.o
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OBJS+= unin_pci.o ppc_chrp.o
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# PowerPC 4xx boards
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OBJS+= pflash_cfi02.o ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o
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OBJS+= ppc440.o
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OBJS+= ppc440.o ppc440_bamboo.o
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ifdef FDT_LIBS
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OBJS+= device_tree.o
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LIBS+= $(FDT_LIBS)
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@ -38,6 +38,7 @@ extern QEMUMachine core99_machine;
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extern QEMUMachine heathrow_machine;
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extern QEMUMachine ref405ep_machine;
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extern QEMUMachine taihu_machine;
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extern QEMUMachine bamboo_machine;
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/* mips_r4k.c */
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extern QEMUMachine mips_machine;
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@ -0,0 +1,190 @@
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/*
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* Qemu PowerPC 440 Bamboo board emulation
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*
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* Copyright 2007 IBM Corporation.
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* Authors:
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* Jerone Young <jyoung5@us.ibm.com>
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* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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* Hollis Blanchard <hollisb@us.ibm.com>
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*
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* This work is licensed under the GNU GPL license version 2 or later.
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*
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*/
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#include "config.h"
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#include "qemu-common.h"
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#include "net.h"
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#include "hw.h"
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#include "pci.h"
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#include "virtio-blk.h"
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#include "boards.h"
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#include "sysemu.h"
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#include "ppc440.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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#include "device_tree.h"
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#define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
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static void *bamboo_load_device_tree(void *addr,
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uint32_t ramsize,
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target_phys_addr_t initrd_base,
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target_phys_addr_t initrd_size,
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const char *kernel_cmdline)
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{
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void *fdt = NULL;
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#ifdef HAVE_FDT
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uint32_t mem_reg_property[] = { 0, 0, ramsize };
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char *path;
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int pathlen;
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int ret;
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pathlen = snprintf(NULL, 0, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE) + 1;
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path = qemu_malloc(pathlen);
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if (path == NULL)
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return NULL;
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snprintf(path, pathlen, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE);
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fdt = load_device_tree(path, addr);
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free(path);
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if (fdt == NULL)
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goto out;
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/* Manipulate device tree in memory. */
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ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
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sizeof(mem_reg_property));
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if (ret < 0)
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fprintf(stderr, "couldn't set /memory/reg\n");
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ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
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initrd_base);
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
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ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
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(initrd_base + initrd_size));
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
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ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
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kernel_cmdline);
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/bootargs\n");
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if (kvm_enabled())
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kvmppc_fdt_update(fdt);
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out:
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#endif
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return fdt;
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}
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static void bamboo_init(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
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NICInfo *nd;
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PCIBus *pcibus;
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CPUState *env;
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uint64_t elf_entry;
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uint64_t elf_lowaddr;
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target_ulong entry = 0;
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target_ulong loadaddr = 0;
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target_long kernel_size = 0;
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target_ulong initrd_base = 0;
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target_long initrd_size = 0;
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target_ulong dt_base = 0;
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void *fdt;
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int i;
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/* Setup CPU. */
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env = ppc440ep_init(&ram_size, &pcibus, pci_irq_nrs, 1);
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if (pcibus) {
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int unit_id = 0;
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/* Add virtio block devices. */
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while ((i = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
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virtio_blk_init(pcibus, drives_table[i].bdrv);
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unit_id++;
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}
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/* Register network interfaces. */
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for (i = 0; i < nb_nics; i++) {
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nd = &nd_table[i];
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if (!nd->model) {
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/* There are no PCI NICs on the Bamboo board, but there are
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* PCI slots, so we can pick model whatever we want. */
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nd->model = "e1000";
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}
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pci_nic_init(pcibus, nd, -1);
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}
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}
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/* Load kernel. */
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if (kernel_filename) {
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kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
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if (kernel_size < 0) {
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kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
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NULL);
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entry = elf_entry;
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loadaddr = elf_lowaddr;
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}
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/* XXX try again as binary */
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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kernel_filename);
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exit(1);
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}
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}
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/* Load initrd. */
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if (initrd_filename) {
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initrd_base = kernel_size + loadaddr;
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initrd_size = load_image(initrd_filename, phys_ram_base + initrd_base);
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if (initrd_size < 0) {
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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exit(1);
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}
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}
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/* If we're loading a kernel directly, we must load the device tree too. */
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if (kernel_filename) {
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if (initrd_base)
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dt_base = initrd_base + initrd_size;
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else
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dt_base = kernel_size + loadaddr;
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fdt = bamboo_load_device_tree(phys_ram_base + dt_base, ram_size,
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initrd_base, initrd_size, kernel_cmdline);
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if (fdt == NULL) {
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fprintf(stderr, "couldn't load device tree\n");
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exit(1);
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}
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/* Set initial guest state. */
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env->gpr[1] = (16<<20) - 8;
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env->gpr[3] = dt_base;
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env->nip = entry;
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/* XXX we currently depend on KVM to create some initial TLB entries. */
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}
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if (kvm_enabled())
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kvmppc_init();
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}
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QEMUMachine bamboo_machine = {
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.name = "bamboo",
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.desc = "bamboo",
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.init = bamboo_init,
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.ram_require = 8<<20 | RAMSIZE_FIXED,
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};
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@ -0,0 +1,234 @@
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/*
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* Device Tree Source for AMCC Bamboo
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*
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* Copyright (c) 2006, 2007 IBM Corp.
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* Josh Boyer <jwboyer@linux.vnet.ibm.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*/
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "amcc,bamboo";
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compatible = "amcc,bamboo";
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dcr-parent = <&/cpus/cpu@0>;
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aliases {
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serial0 = &UART0;
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serial1 = &UART1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,440EP";
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reg = <0>;
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clock-frequency = <1fca0550>;
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timebase-frequency = <017d7840>;
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i-cache-line-size = <20>;
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d-cache-line-size = <20>;
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i-cache-size = <8000>;
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d-cache-size = <8000>;
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0 9000000>;
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0c0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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/*
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0d0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <1e 4 1f 4>;
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interrupt-parent = <&UIC0>;
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};
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*/
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SDR0: sdr {
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compatible = "ibm,sdr-440ep";
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dcr-reg = <00e 002>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440ep";
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dcr-reg = <00c 002>;
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};
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plb {
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compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <07f28154>;
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SDRAM0: sdram {
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compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
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dcr-reg = <010 2>;
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};
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DMA0: dma {
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compatible = "ibm,dma-440ep", "ibm,dma-440gp";
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dcr-reg = <100 027>;
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};
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POB0: opb {
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compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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/* Bamboo is oddball in the 44x world and doesn't use the ERPN
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* bits.
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*/
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ranges = <00000000 0 00000000 80000000
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80000000 0 80000000 80000000>;
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/* interrupt-parent = <&UIC1>; */
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interrupts = <7 4>;
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clock-frequency = <03f940aa>;
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EBC0: ebc {
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compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
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dcr-reg = <012 2>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <03f940aa>;
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interrupts = <5 1>;
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/* interrupt-parent = <&UIC1>; */
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600300 8>;
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virtual-reg = <ef600300>;
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clock-frequency = <00a8c000>;
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current-speed = <1c200>;
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interrupt-parent = <&UIC0>;
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interrupts = <0 4>;
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600400 8>;
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virtual-reg = <ef600400>;
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clock-frequency = <00a8c000>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <1 4>;
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};
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/*
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600500 8>;
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virtual-reg = <ef600500>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <3 4>;
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600600 8>;
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virtual-reg = <ef600600>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <4 4>;
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};
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*/
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IIC0: i2c@ef600700 {
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device_type = "i2c";
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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reg = <ef600700 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <2 4>;
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};
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IIC1: i2c@ef600800 {
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device_type = "i2c";
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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reg = <ef600800 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <7 4>;
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};
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ZMII0: emac-zmii@ef600d00 {
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device_type = "zmii-interface";
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compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
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reg = <ef600d00 c>;
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};
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};
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PCI0: pci@ec000000 {
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
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primary;
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reg = <0 eec00000 8 /* Config space access */
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0 eed00000 4 /* IACK */
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0 eed00000 4 /* Special cycle */
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0 ef400000 40>; /* Internal registers */
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed. Chip supports a second
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* IO range but we don't use it for now
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*/
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ranges = <02000000 0 a0000000 0 a0000000 0 20000000
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01000000 0 00000000 0 e8000000 0 00010000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <42000000 0 0 0 0 0 80000000>;
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/* Bamboo has all 4 IRQ pins tied together per slot */
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interrupt-map-mask = <f800 0 0 0>;
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interrupt-map = <
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/* IDSEL 1 */
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0800 0 0 0 &UIC0 1c 8
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/* IDSEL 2 */
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1000 0 0 0 &UIC0 1b 8
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/* IDSEL 3 */
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1800 0 0 0 &UIC0 1a 8
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/* IDSEL 4 */
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2000 0 0 0 &UIC0 19 8
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>;
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};
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};
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chosen {
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linux,stdout-path = "/plb/opb/serial@ef600300";
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};
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};
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@ -8,6 +8,7 @@ void register_machines(void)
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qemu_register_machine(&prep_machine);
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qemu_register_machine(&ref405ep_machine);
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qemu_register_machine(&taihu_machine);
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qemu_register_machine(&bamboo_machine);
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}
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void cpu_save(QEMUFile *f, void *opaque)
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