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Memory-mapped interface for RTC, by Herve Poussineau.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2686 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-04-16 17:21:21 +00:00
parent b92bb99b80
commit 2ca9d01385
2 changed files with 94 additions and 0 deletions
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93
hw/mc146818rtc.c
View File

@ -55,6 +55,7 @@ struct RTCState {
uint8_t cmos_index;
struct tm current_tm;
qemu_irq irq;
target_phys_addr_t base;
/* periodic timer */
QEMUTimer *periodic_timer;
int64_t next_periodic_time;
@ -486,3 +487,95 @@ RTCState *rtc_init(int base, qemu_irq irq)
return s;
}
/* Memory mapped interface */
uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
return cmos_ioport_read(s, addr - s->base) & 0xFF;
}
void cmos_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
cmos_ioport_write(s, addr - s->base, value & 0xFF);
}
uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
return cmos_ioport_read(s, addr - s->base) & 0xFFFF;
}
void cmos_mm_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
cmos_ioport_write(s, addr - s->base, value & 0xFFFF);
}
uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
return cmos_ioport_read(s, addr - s->base);
}
void cmos_mm_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
cmos_ioport_write(s, addr - s->base, value);
}
static CPUReadMemoryFunc *rtc_mm_read[] = {
&cmos_mm_readb,
&cmos_mm_readw,
&cmos_mm_readl,
};
static CPUWriteMemoryFunc *rtc_mm_write[] = {
&cmos_mm_writeb,
&cmos_mm_writew,
&cmos_mm_writel,
};
RTCState *rtc_mm_init(target_phys_addr_t base, qemu_irq irq)
{
RTCState *s;
int io_memory;
s = qemu_mallocz(sizeof(RTCState));
if (!s)
return NULL;
s->irq = irq;
s->cmos_data[RTC_REG_A] = 0x26;
s->cmos_data[RTC_REG_B] = 0x02;
s->cmos_data[RTC_REG_C] = 0x00;
s->cmos_data[RTC_REG_D] = 0x80;
s->base = base;
rtc_set_date_from_host(s);
s->periodic_timer = qemu_new_timer(vm_clock,
rtc_periodic_timer, s);
s->second_timer = qemu_new_timer(vm_clock,
rtc_update_second, s);
s->second_timer2 = qemu_new_timer(vm_clock,
rtc_update_second2, s);
s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 100;
qemu_mod_timer(s->second_timer2, s->next_second_time);
io_memory = cpu_register_io_memory(0, rtc_mm_read, rtc_mm_write, s);
cpu_register_physical_memory(base, 2, io_memory);
register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s);
return s;
}

1
vl.h
View File

@ -1043,6 +1043,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, target_ulong base, int
typedef struct RTCState RTCState;
RTCState *rtc_init(int base, qemu_irq irq);
RTCState *rtc_mm_init(target_phys_addr_t base, qemu_irq irq);
void rtc_set_memory(RTCState *s, int addr, int val);
void rtc_set_date(RTCState *s, const struct tm *tm);