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tcg/mips: Always implement movcond

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Expand as branch over move if not supported in the ISA.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231026041404.1229328-3-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-25 21:14:00 -07:00
parent 42221a64da
commit 2cff741da8
2 changed files with 16 additions and 7 deletions
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19
tcg/mips/tcg-target.c.inc
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@ -1070,13 +1070,22 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
if (v2 != 0) {
tcg_out_opc_reg(s, OPC_OR, ret, ret, TCG_TMP1);
}
} else {
return;
}
/* This should be guaranteed via constraints */
tcg_debug_assert(v2 == ret);
if (use_movnz_instructions) {
MIPSInsn m_opc = eqz ? OPC_MOVZ : OPC_MOVN;
tcg_out_opc_reg(s, m_opc, ret, v1, c1);
/* This should be guaranteed via constraints */
tcg_debug_assert(v2 == ret);
} else {
/* Invert the condition in order to branch over the move. */
MIPSInsn b_opc = eqz ? OPC_BNE : OPC_BEQ;
tcg_out_opc_imm(s, b_opc, c1, TCG_REG_ZERO, 2);
tcg_out_nop(s);
/* Open-code tcg_out_mov, without the nop-move check. */
tcg_out_opc_reg(s, OPC_OR, ret, v1, TCG_REG_ZERO);
}
}

4
tcg/mips/tcg-target.h
View File

@ -154,7 +154,7 @@ extern bool use_mips32r2_instructions;
#endif
/* optional instructions detected at runtime */
#define TCG_TARGET_HAS_movcond_i32 use_movnz_instructions
#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_bswap16_i32 use_mips32r2_instructions
#define TCG_TARGET_HAS_deposit_i32 use_mips32r2_instructions
#define TCG_TARGET_HAS_extract_i32 use_mips32r2_instructions
@ -169,7 +169,7 @@ extern bool use_mips32r2_instructions;
#define TCG_TARGET_HAS_qemu_st8_i32 0
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_movcond_i64 use_movnz_instructions
#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_bswap16_i64 use_mips32r2_instructions
#define TCG_TARGET_HAS_bswap32_i64 use_mips32r2_instructions
#define TCG_TARGET_HAS_bswap64_i64 use_mips32r2_instructions