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target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'

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Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types. Move the declaration
(along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".

"target/foo/cpu-qom.h" is supposed to be target agnostic
(include-able by any target). Add such mention in the
header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-7-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-06 10:58:06 +02:00
parent 66125f9360
commit 2d56be5a29
24 changed files with 47 additions and 33 deletions
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5
target/alpha/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU Alpha CPU
* QEMU Alpha CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
/**
* AlphaCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/alpha/cpu.h
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@ -426,8 +426,6 @@ enum {
void alpha_translate_init(void);
#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
void alpha_cpu_list(void);

5
target/avr/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU AVR CPU
* QEMU AVR CPU QOM header (target agnostic)
*
* Copyright (c) 2016-2020 Michael Rolnik
*
@ -28,6 +28,9 @@
OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU)
#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
/**
* AVRCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/avr/cpu.h
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@ -28,8 +28,6 @@
#error "AVR 8-bit does not support user mode"
#endif
#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_AVR_CPU
#define TCG_GUEST_DEFAULT_MO 0

5
target/cris/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU CRIS CPU
* QEMU CRIS CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(CRISCPU, CRISCPUClass, CRIS_CPU)
#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
/**
* CRISCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/cris/cpu.h
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@ -240,8 +240,6 @@ enum {
/* CRIS uses 8k pages. */
#define MMAP_SHIFT TARGET_PAGE_BITS
#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_CRIS_CPU
/* MMU modes definitions */

3
target/i386/cpu-qom.h
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@ -32,6 +32,9 @@
OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU)
#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
typedef struct X86CPUModel X86CPUModel;
/**

2
target/i386/cpu.h
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@ -2239,8 +2239,6 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
/* hw/pc.c */
uint64_t cpu_get_tsc(CPUX86State *env);
#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_X86_CPU
#ifdef TARGET_X86_64

5
target/m68k/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU Motorola 68k CPU
* QEMU Motorola 68k CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU)
#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
/*
* M68kCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/m68k/cpu.h
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@ -561,8 +561,6 @@ enum {
ACCESS_DATA = 0x20, /* Data load/store access */
};
#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_M68K_CPU
#define cpu_list m68k_cpu_list

3
target/mips/cpu-qom.h
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@ -31,6 +31,9 @@
OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
/**
* MIPSCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/mips/cpu.h
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@ -1301,8 +1301,6 @@ enum {
*/
#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
bool cpu_type_supports_cps_smp(const char *cpu_type);

5
target/rx/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* RX CPU
* QEMU RX CPU QOM header (target agnostic)
*
* Copyright (c) 2019 Yoshinori Sato
*
@ -28,6 +28,9 @@
OBJECT_DECLARE_CPU_TYPE(RXCPU, RXCPUClass, RX_CPU)
#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
/*
* RXCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/rx/cpu.h
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@ -112,8 +112,6 @@ struct ArchCPU {
CPURXState env;
};
#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_RX_CPU
const char *rx_crname(uint8_t cr);

5
target/s390x/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU S/390 CPU
* QEMU S/390 CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(S390CPU, S390CPUClass, S390_CPU)
#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
typedef struct S390CPUModel S390CPUModel;
typedef struct S390CPUDef S390CPUDef;

2
target/s390x/cpu.h
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@ -890,8 +890,6 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga,
/* helper.c */
#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_S390_CPU
/* interrupt.c */

5
target/sh4/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU SuperH CPU
* QEMU SuperH CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@ -31,6 +31,9 @@
OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU)
#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
/**
* SuperHCPUClass:
* @parent_realize: The parent class' realize handler.

2
target/sh4/cpu.h
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@ -250,8 +250,6 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr);
void cpu_load_tlb(CPUSH4State * env);
#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
#define cpu_list sh4_cpu_list

5
target/sparc/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU SPARC CPU
* QEMU SPARC CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@ -31,6 +31,9 @@
OBJECT_DECLARE_CPU_TYPE(SPARCCPU, SPARCCPUClass, SPARC_CPU)
#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
typedef struct sparc_def_t sparc_def_t;
/**
* SPARCCPUClass:

2
target/sparc/cpu.h
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@ -654,8 +654,6 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
#endif
#endif
#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_SPARC_CPU
#define cpu_list sparc_cpu_list

5
target/tricore/cpu-qom.h
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@ -1,4 +1,6 @@
/*
* QEMU TriCore CPU QOM header (target agnostic)
*
* Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
*
* This library is free software; you can redistribute it and/or
@ -26,6 +28,9 @@
OBJECT_DECLARE_CPU_TYPE(TriCoreCPU, TriCoreCPUClass, TRICORE_CPU)
#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
struct TriCoreCPUClass {
CPUClass parent_class;

2
target/tricore/cpu.h
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@ -268,8 +268,6 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, vaddr *pc,
*flags = new_flags;
}
#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
/* helpers.c */

5
target/xtensa/cpu-qom.h
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@ -1,5 +1,5 @@
/*
* QEMU Xtensa CPU
* QEMU Xtensa CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
* All rights reserved.
@ -36,6 +36,9 @@
OBJECT_DECLARE_CPU_TYPE(XtensaCPU, XtensaCPUClass, XTENSA_CPU)
#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
typedef struct XtensaConfig XtensaConfig;
/**

2
target/xtensa/cpu.h
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@ -586,8 +586,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
#define cpu_list xtensa_cpu_list
#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
#if TARGET_BIG_ENDIAN