hw/mips: Use object_initialize() on MIPSCPSState
Initialize the MIPSCPSState with object_initialize() instead of object_new(). This will allow us to add it as children of the machine container. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190507163416.24647-10-philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
parent
d031379803
commit
2d5fac809c
@ -49,7 +49,7 @@ typedef struct {
|
||||
SysBusDevice parent_obj;
|
||||
|
||||
MachineState *mach;
|
||||
MIPSCPSState *cps;
|
||||
MIPSCPSState cps;
|
||||
SerialState *uart;
|
||||
|
||||
CharBackend lcd_display;
|
||||
@ -188,7 +188,7 @@ static uint64_t boston_platreg_read(void *opaque, hwaddr addr,
|
||||
case PLAT_DDR3_STATUS:
|
||||
return PLAT_DDR3_STATUS_LOCKED | PLAT_DDR3_STATUS_CALIBRATED;
|
||||
case PLAT_MMCM_DIV:
|
||||
gic_freq = mips_gictimer_get_freq(s->cps->gic.gic_timer) / 1000000;
|
||||
gic_freq = mips_gictimer_get_freq(s->cps.gic.gic_timer) / 1000000;
|
||||
val = gic_freq << PLAT_MMCM_DIV_INPUT_SHIFT;
|
||||
val |= 1 << PLAT_MMCM_DIV_MUL_SHIFT;
|
||||
val |= 1 << PLAT_MMCM_DIV_CLK0DIV_SHIFT;
|
||||
@ -455,20 +455,19 @@ static void boston_mach_init(MachineState *machine)
|
||||
|
||||
is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
|
||||
|
||||
s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
|
||||
qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
|
||||
|
||||
object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
|
||||
object_initialize(&s->cps, sizeof(s->cps), TYPE_MIPS_CPS);
|
||||
qdev_set_parent_bus(DEVICE(&s->cps), sysbus_get_default());
|
||||
object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type",
|
||||
&err);
|
||||
object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
|
||||
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
|
||||
object_property_set_int(OBJECT(&s->cps), smp_cpus, "num-vp", &err);
|
||||
object_property_set_bool(OBJECT(&s->cps), true, "realized", &err);
|
||||
|
||||
if (err != NULL) {
|
||||
error_report("%s", error_get_pretty(err));
|
||||
exit(1);
|
||||
}
|
||||
|
||||
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
|
||||
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1);
|
||||
|
||||
flash = g_new(MemoryRegion, 1);
|
||||
memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err);
|
||||
@ -487,17 +486,17 @@ static void boston_mach_init(MachineState *machine)
|
||||
xilinx_pcie_init(sys_mem, 0,
|
||||
0x10000000, 32 * MiB,
|
||||
0x40000000, 1 * GiB,
|
||||
get_cps_irq(s->cps, 2), false);
|
||||
get_cps_irq(&s->cps, 2), false);
|
||||
|
||||
xilinx_pcie_init(sys_mem, 1,
|
||||
0x12000000, 32 * MiB,
|
||||
0x20000000, 512 * MiB,
|
||||
get_cps_irq(s->cps, 1), false);
|
||||
get_cps_irq(&s->cps, 1), false);
|
||||
|
||||
pcie2 = xilinx_pcie_init(sys_mem, 2,
|
||||
0x14000000, 32 * MiB,
|
||||
0x16000000, 1 * MiB,
|
||||
get_cps_irq(s->cps, 0), true);
|
||||
get_cps_irq(&s->cps, 0), true);
|
||||
|
||||
platreg = g_new(MemoryRegion, 1);
|
||||
memory_region_init_io(platreg, NULL, &boston_platreg_ops, s,
|
||||
@ -505,7 +504,7 @@ static void boston_mach_init(MachineState *machine)
|
||||
memory_region_add_subregion_overlap(sys_mem, 0x17ffd000, platreg, 0);
|
||||
|
||||
s->uart = serial_mm_init(sys_mem, 0x17ffe000, 2,
|
||||
get_cps_irq(s->cps, 3), 10000000,
|
||||
get_cps_irq(&s->cps, 3), 10000000,
|
||||
serial_hd(0), DEVICE_NATIVE_ENDIAN);
|
||||
|
||||
lcd = g_new(MemoryRegion, 1);
|
||||
|
@ -94,7 +94,7 @@ typedef struct {
|
||||
typedef struct {
|
||||
SysBusDevice parent_obj;
|
||||
|
||||
MIPSCPSState *cps;
|
||||
MIPSCPSState cps;
|
||||
qemu_irq *i8259;
|
||||
} MaltaState;
|
||||
|
||||
@ -1151,20 +1151,19 @@ static void create_cps(MaltaState *s, const char *cpu_type,
|
||||
{
|
||||
Error *err = NULL;
|
||||
|
||||
s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
|
||||
qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
|
||||
|
||||
object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", &err);
|
||||
object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
|
||||
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
|
||||
object_initialize(&s->cps, sizeof(s->cps), TYPE_MIPS_CPS);
|
||||
qdev_set_parent_bus(DEVICE(&s->cps), sysbus_get_default());
|
||||
object_property_set_str(OBJECT(&s->cps), cpu_type, "cpu-type", &err);
|
||||
object_property_set_int(OBJECT(&s->cps), smp_cpus, "num-vp", &err);
|
||||
object_property_set_bool(OBJECT(&s->cps), true, "realized", &err);
|
||||
if (err != NULL) {
|
||||
error_report("%s", error_get_pretty(err));
|
||||
exit(1);
|
||||
}
|
||||
|
||||
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
|
||||
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1);
|
||||
|
||||
*i8259_irq = get_cps_irq(s->cps, 3);
|
||||
*i8259_irq = get_cps_irq(&s->cps, 3);
|
||||
*cbus_irq = NULL;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user