target/cris: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240129164514.73104-11-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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@ -63,10 +63,9 @@ static int cris_cpu_mmu_index(CPUState *cs, bool ifetch)
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static void cris_cpu_reset_hold(Object *obj)
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{
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CPUState *s = CPU(obj);
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CRISCPU *cpu = CRIS_CPU(s);
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CPUState *cs = CPU(obj);
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CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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uint32_t vr;
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if (ccc->parent_phases.hold) {
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@ -147,10 +146,7 @@ static void cris_cpu_set_irq(void *opaque, int irq, int level)
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static void cris_disas_set_info(CPUState *cpu, disassemble_info *info)
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{
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CRISCPU *cc = CRIS_CPU(cpu);
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CPUCRISState *env = &cc->env;
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if (env->pregs[PR_VR] != 32) {
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if (cpu_env(cpu)->pregs[PR_VR] != 32) {
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info->mach = bfd_mach_cris_v0_v10;
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info->print_insn = print_insn_crisv10;
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} else {
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@ -23,8 +23,7 @@
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int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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if (n < 15) {
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return gdb_get_reg32(mem_buf, env->regs[n]);
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@ -55,8 +54,7 @@ int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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uint8_t srs;
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srs = env->pregs[PR_SRS];
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@ -90,8 +88,7 @@ int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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int cris_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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uint32_t tmp;
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if (n > 49) {
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@ -53,8 +53,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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struct cris_mmu_result res;
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int prot, miss;
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target_ulong phy;
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@ -97,8 +96,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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void crisv10_cpu_do_interrupt(CPUState *cs)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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int ex_vec = -1;
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D_LOG("exception index=%d interrupt_req=%d\n",
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@ -159,8 +157,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs)
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void cris_cpu_do_interrupt(CPUState *cs)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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int ex_vec = -1;
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D_LOG("exception index=%d interrupt_req=%d\n",
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@ -262,8 +259,7 @@ hwaddr cris_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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CPUClass *cc = CPU_GET_CLASS(cs);
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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bool ret = false;
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if (interrupt_request & CPU_INTERRUPT_HARD
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@ -3002,7 +3002,6 @@ static void cris_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
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static void cris_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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CPUCRISState *env = cpu_env(cs);
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unsigned int insn_len;
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/* Pretty disas. */
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@ -3010,7 +3009,7 @@ static void cris_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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dc->clear_x = 1;
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insn_len = dc->decoder(env, dc);
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insn_len = dc->decoder(cpu_env(cs), dc);
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dc->ppc = dc->pc;
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dc->pc += insn_len;
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dc->base.pc_next += insn_len;
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@ -3176,8 +3175,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns,
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void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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CPUCRISState *env = cpu_env(cs);
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const char * const *regnames;
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const char * const *pregnames;
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int i;
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