hw/i386: Move arch_id decode inside x86_cpus_init
Apicid calculation depends on knowing the total number of numa nodes for EPYC cpu models. Right now, we are calculating the arch_id while parsing the numa(parse_numa). At this time, it is not known how many total numa nodes are configured in the system. Move the arch_id calculation inside x86_cpus_init. At this time, smp parse is already completed and numa node information is available. Override the handlers if use_epyc_apic_id_encoding is enabled in cpu model definition. Also replace the calling convention to use handlers from X86MachineState. Signed-off-by: Babu Moger <babu.moger@amd.com> Message-Id: <158396724217.58170.12256158354204870716.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -1580,14 +1580,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
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topo_ids.die_id = cpu->die_id;
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topo_ids.core_id = cpu->core_id;
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topo_ids.smt_id = cpu->thread_id;
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cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids);
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cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids);
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}
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cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx);
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if (!cpu_slot) {
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MachineState *ms = MACHINE(pcms);
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x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
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x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
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error_setg(errp,
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"Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
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" APIC ID %" PRIu32 ", valid index range 0:%d",
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@ -1608,7 +1608,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
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/* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
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* once -smp refactoring is complete and there will be CPU private
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* CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
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x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
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x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
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if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
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error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
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" 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id,
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@ -68,6 +68,22 @@ inline void init_topo_info(X86CPUTopoInfo *topo_info,
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topo_info->threads_per_core = ms->smp.threads;
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}
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/*
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* Set up with the new EPYC topology handlers
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*
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* AMD uses different apic id encoding for EPYC based cpus. Override
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* the default topo handlers with EPYC encoding handlers.
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*/
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static void x86_set_epyc_topo_handlers(MachineState *machine)
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{
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X86MachineState *x86ms = X86_MACHINE(machine);
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x86ms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx_epyc;
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x86ms->topo_ids_from_apicid = x86_topo_ids_from_apicid_epyc;
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x86ms->apicid_from_topo_ids = x86_apicid_from_topo_ids_epyc;
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x86ms->apicid_pkg_offset = apicid_pkg_offset_epyc;
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}
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/*
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* Calculates initial APIC ID for a specific CPU index
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*
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@ -86,7 +102,7 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
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init_topo_info(&topo_info, x86ms);
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correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index);
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correct_id = x86ms->apicid_from_cpu_idx(&topo_info, cpu_index);
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if (x86mc->compat_apic_id_mode) {
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if (cpu_index != correct_id && !warned && !qtest_enabled()) {
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error_report("APIC IDs set in compatibility mode, "
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@ -121,6 +137,11 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version)
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MachineState *ms = MACHINE(x86ms);
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MachineClass *mc = MACHINE_GET_CLASS(x86ms);
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/* Check for apicid encoding */
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if (cpu_x86_use_epyc_apic_id_encoding(ms->cpu_type)) {
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x86_set_epyc_topo_handlers(ms);
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}
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x86_cpu_set_default_version(default_cpu_version);
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/*
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@ -134,6 +155,12 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version)
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x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms,
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ms->smp.max_cpus - 1) + 1;
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possible_cpus = mc->possible_cpu_arch_ids(ms);
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for (i = 0; i < ms->possible_cpus->len; i++) {
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ms->possible_cpus->cpus[i].arch_id =
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x86_cpu_apic_id_from_index(x86ms, i);
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}
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for (i = 0; i < ms->smp.cpus; i++) {
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x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal);
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}
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@ -158,8 +185,7 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
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init_topo_info(&topo_info, x86ms);
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assert(idx < ms->possible_cpus->len);
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x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
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&topo_info, &topo_ids);
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x86_topo_ids_from_idx(&topo_info, idx, &topo_ids);
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return topo_ids.pkg_id % ms->numa_state->num_nodes;
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}
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@ -190,10 +216,7 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
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ms->possible_cpus->cpus[i].type = ms->cpu_type;
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ms->possible_cpus->cpus[i].vcpus_count = 1;
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ms->possible_cpus->cpus[i].arch_id =
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x86_cpu_apic_id_from_index(x86ms, i);
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x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
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&topo_info, &topo_ids);
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x86_topo_ids_from_idx(&topo_info, i, &topo_ids);
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ms->possible_cpus->cpus[i].props.has_socket_id = true;
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ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
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if (x86ms->smp_dies > 1) {
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