Fix register references (Igor Kovalenko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4002 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -214,7 +214,7 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,
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int ret, tcg_target_long arg)
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int ret, tcg_target_long arg)
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{
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{
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if (arg == (arg & 0xfff))
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if (arg == (arg & 0xfff))
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tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS2(TCG_REG_G0) |
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tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS1(TCG_REG_G0) |
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INSN_IMM13(arg));
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INSN_IMM13(arg));
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else {
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else {
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tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10));
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tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10));
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@ -312,7 +312,7 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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/* indirect jump method */
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/* indirect jump method */
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tcg_out_ld_raw(s, TCG_REG_O7, (tcg_target_long)(s->tb_next + args[0]));
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tcg_out_ld_raw(s, TCG_REG_O7, (tcg_target_long)(s->tb_next + args[0]));
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tcg_out32(s, JMPL | INSN_RD(TCG_REG_O7) | INSN_RS1(TCG_REG_O7) |
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tcg_out32(s, JMPL | INSN_RD(TCG_REG_O7) | INSN_RS1(TCG_REG_O7) |
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INSN_RD(TCG_REG_G0));
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INSN_RS2(TCG_REG_G0));
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tcg_out_nop(s);
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tcg_out_nop(s);
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}
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}
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s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
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s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
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@ -326,7 +326,7 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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} else {
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} else {
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tcg_out_ld_raw(s, TCG_REG_O7, (tcg_target_long)(s->tb_next + args[0]));
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tcg_out_ld_raw(s, TCG_REG_O7, (tcg_target_long)(s->tb_next + args[0]));
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tcg_out32(s, JMPL | INSN_RD(TCG_REG_O7) | INSN_RS1(TCG_REG_O7) |
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tcg_out32(s, JMPL | INSN_RD(TCG_REG_O7) | INSN_RS1(TCG_REG_O7) |
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INSN_RD(TCG_REG_G0));
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INSN_RS2(TCG_REG_G0));
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tcg_out_nop(s);
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tcg_out_nop(s);
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}
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}
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break;
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break;
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