tcg: Remove TCG_TARGET_HAS_direct_jump
We now have the option to generate direct or indirect goto_tb depending on the dynamic displacement, thus the define is no longer necessary or completely accurate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -572,19 +572,18 @@ void cpu_exec_step_atomic(CPUState *cpu)
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void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
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{
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/*
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* Get the rx view of the structure, from which we find the
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* executable code address, and tb_target_set_jmp_target can
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* produce a pc-relative displacement to jmp_target_addr[n].
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*/
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const TranslationBlock *c_tb = tcg_splitwx_to_rx(tb);
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uintptr_t offset = tb->jmp_insn_offset[n];
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uintptr_t jmp_rx = (uintptr_t)tb->tc.ptr + offset;
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uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
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tb->jmp_target_addr[n] = addr;
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if (TCG_TARGET_HAS_direct_jump) {
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/*
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* Get the rx view of the structure, from which we find the
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* executable code address, and tb_target_set_jmp_target can
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* produce a pc-relative displacement to jmp_target_addr[n].
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*/
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const TranslationBlock *c_tb = tcg_splitwx_to_rx(tb);
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uintptr_t offset = tb->jmp_insn_offset[n];
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uintptr_t jmp_rx = (uintptr_t)tb->tc.ptr + offset;
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uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
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tb_target_set_jmp_target(c_tb, n, jmp_rx, jmp_rw);
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}
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tb_target_set_jmp_target(c_tb, n, jmp_rx, jmp_rw);
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}
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static inline void tb_add_jump(TranslationBlock *tb, int n,
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@ -123,7 +123,6 @@ typedef enum {
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#define TCG_TARGET_HAS_muls2_i64 0
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#define TCG_TARGET_HAS_muluh_i64 1
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#define TCG_TARGET_HAS_mulsh_i64 1
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#define TCG_TARGET_HAS_direct_jump 1
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#define TCG_TARGET_HAS_v64 1
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#define TCG_TARGET_HAS_v128 1
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@ -1945,7 +1945,6 @@ static void tcg_out_goto_tb(TCGContext *s, int which)
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intptr_t ptr, dif, dil;
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TCGReg base = TCG_REG_PC;
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qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
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ptr = get_jmp_target_addr(s, which);
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dif = tcg_pcrel_diff(s, (void *)ptr) - 8;
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dil = sextract32(dif, 0, 12);
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@ -121,7 +121,6 @@ extern bool use_neon_instructions;
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_div_i32 use_idiv_instructions
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#define TCG_TARGET_HAS_rem_i32 0
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#define TCG_TARGET_HAS_direct_jump 0
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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#define TCG_TARGET_HAS_v64 use_neon_instructions
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@ -141,7 +141,6 @@ extern bool have_movbe;
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#define TCG_TARGET_HAS_muls2_i32 1
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_direct_jump 1
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#if TCG_TARGET_REG_BITS == 64
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/* Keep target addresses zero-extended in a register. */
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@ -128,7 +128,6 @@ typedef enum {
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#define TCG_TARGET_HAS_clz_i32 1
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#define TCG_TARGET_HAS_ctz_i32 1
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#define TCG_TARGET_HAS_ctpop_i32 0
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#define TCG_TARGET_HAS_direct_jump 1
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#define TCG_TARGET_HAS_brcond2 0
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#define TCG_TARGET_HAS_setcond2 0
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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@ -1969,7 +1969,6 @@ static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0)
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static void tcg_out_goto_tb(TCGContext *s, int which)
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{
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/* indirect jump method */
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qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, TCG_REG_ZERO,
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get_jmp_target_addr(s, which));
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tcg_out_opc_reg(s, OPC_JR, 0, TCG_TMP0, 0);
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@ -134,7 +134,6 @@ extern bool use_mips32r2_instructions;
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#define TCG_TARGET_HAS_muluh_i32 1
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#define TCG_TARGET_HAS_mulsh_i32 1
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#define TCG_TARGET_HAS_bswap32_i32 1
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#define TCG_TARGET_HAS_direct_jump 0
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_add2_i32 0
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@ -108,7 +108,6 @@ extern bool have_vsx;
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#define TCG_TARGET_HAS_muls2_i32 0
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#define TCG_TARGET_HAS_muluh_i32 1
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#define TCG_TARGET_HAS_mulsh_i32 1
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#define TCG_TARGET_HAS_direct_jump 1
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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#if TCG_TARGET_REG_BITS == 64
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@ -1302,7 +1302,6 @@ static void tcg_out_exit_tb(TCGContext *s, uintptr_t a0)
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static void tcg_out_goto_tb(TCGContext *s, int which)
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{
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qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
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/* indirect jump method */
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_REG_ZERO,
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get_jmp_target_addr(s, which));
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@ -121,7 +121,6 @@ typedef enum {
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#define TCG_TARGET_HAS_clz_i32 0
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#define TCG_TARGET_HAS_ctz_i32 0
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#define TCG_TARGET_HAS_ctpop_i32 0
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#define TCG_TARGET_HAS_direct_jump 0
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#define TCG_TARGET_HAS_brcond2 1
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#define TCG_TARGET_HAS_setcond2 1
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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@ -1973,6 +1973,9 @@ static void tcg_out_goto_tb(TCGContext *s, int which)
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void tb_target_set_jmp_target(const TranslationBlock *tb, int n,
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uintptr_t jmp_rx, uintptr_t jmp_rw)
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{
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if (!HAVE_FACILITY(GEN_INST_EXT)) {
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return;
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}
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/* patch the branch destination */
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uintptr_t addr = tb->jmp_target_addr[n];
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intptr_t disp = addr - (jmp_rx - 2);
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@ -105,7 +105,6 @@ extern uint64_t s390_facilities[3];
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_extrl_i64_i32 0
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#define TCG_TARGET_HAS_extrh_i64_i32 0
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#define TCG_TARGET_HAS_direct_jump 1
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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#define TCG_TARGET_HAS_div2_i64 1
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@ -111,7 +111,6 @@ extern bool use_vis3_instructions;
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#define TCG_TARGET_HAS_muls2_i32 1
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_direct_jump 1
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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#define TCG_TARGET_HAS_extrl_i64_i32 1
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@ -320,7 +320,6 @@ static void G_GNUC_UNUSED set_jmp_insn_offset(TCGContext *s, int which)
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* We will check for overflow at the end of the opcode loop in
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* tcg_gen_code, where we bound tcg_current_code_size to UINT16_MAX.
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*/
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tcg_debug_assert(TCG_TARGET_HAS_direct_jump);
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s->gen_tb->jmp_insn_offset[which] = tcg_current_code_size(s);
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}
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@ -597,7 +597,6 @@ static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg)
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static void tcg_out_goto_tb(TCGContext *s, int which)
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{
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qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
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/* indirect jump method. */
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tcg_out_op_p(s, INDEX_op_goto_tb, (void *)get_jmp_target_addr(s, which));
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set_jmp_reset_offset(s, which);
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@ -82,7 +82,6 @@
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#define TCG_TARGET_HAS_muls2_i32 1
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_direct_jump 0
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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#if TCG_TARGET_REG_BITS == 64
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