nvme: properly report volatile write caches
Implement support in Identify and Get/Set Features to properly report and allow to change the Volatile Write Cache status reported by the virtual NVMe device. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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@ -487,26 +487,32 @@ static uint16_t nvme_identify(NvmeCtrl *n, NvmeCmd *cmd)
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static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
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static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
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{
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{
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uint32_t dw10 = le32_to_cpu(cmd->cdw10);
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uint32_t dw10 = le32_to_cpu(cmd->cdw10);
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uint32_t result;
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switch (dw10) {
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switch (dw10) {
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case NVME_NUMBER_OF_QUEUES:
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req->cqe.result =
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cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
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break;
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case NVME_VOLATILE_WRITE_CACHE:
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case NVME_VOLATILE_WRITE_CACHE:
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req->cqe.result = cpu_to_le32(1);
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result = blk_enable_write_cache(n->conf.blk);
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break;
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case NVME_NUMBER_OF_QUEUES:
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result = cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
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break;
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break;
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default:
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default:
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return NVME_INVALID_FIELD | NVME_DNR;
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return NVME_INVALID_FIELD | NVME_DNR;
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}
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}
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req->cqe.result = result;
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return NVME_SUCCESS;
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return NVME_SUCCESS;
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}
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}
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static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
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static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
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{
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{
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uint32_t dw10 = le32_to_cpu(cmd->cdw10);
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uint32_t dw10 = le32_to_cpu(cmd->cdw10);
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uint32_t dw11 = le32_to_cpu(cmd->cdw11);
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switch (dw10) {
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switch (dw10) {
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case NVME_VOLATILE_WRITE_CACHE:
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blk_set_enable_write_cache(n->conf.blk, dw11 & 1);
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break;
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case NVME_NUMBER_OF_QUEUES:
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case NVME_NUMBER_OF_QUEUES:
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req->cqe.result =
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req->cqe.result =
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cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
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cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
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@ -831,6 +837,9 @@ static int nvme_init(PCIDevice *pci_dev)
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id->psd[0].mp = cpu_to_le16(0x9c4);
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id->psd[0].mp = cpu_to_le16(0x9c4);
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id->psd[0].enlat = cpu_to_le32(0x10);
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id->psd[0].enlat = cpu_to_le32(0x10);
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id->psd[0].exlat = cpu_to_le32(0x4);
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id->psd[0].exlat = cpu_to_le32(0x4);
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if (blk_enable_write_cache(n->conf.blk)) {
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id->vwc = 1;
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}
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n->bar.cap = 0;
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n->bar.cap = 0;
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NVME_CAP_SET_MQES(n->bar.cap, 0x7ff);
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NVME_CAP_SET_MQES(n->bar.cap, 0x7ff);
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