rc4030: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
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5a6fdd91ce
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3054434d61
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@ -20,7 +20,8 @@ void rc4030_dma_read(void *dma, uint8_t *buf, int len);
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void rc4030_dma_write(void *dma, uint8_t *buf, int len);
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void rc4030_dma_write(void *dma, uint8_t *buf, int len);
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void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
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void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
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qemu_irq **irqs, rc4030_dma **dmas);
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qemu_irq **irqs, rc4030_dma **dmas,
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MemoryRegion *sysmem);
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/* dp8393x.c */
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/* dp8393x.c */
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void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
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void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
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@ -177,7 +177,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
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cpu_mips_clock_init(env);
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cpu_mips_clock_init(env);
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/* Chipset */
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/* Chipset */
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rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
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rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas,
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address_space);
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memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
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memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
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memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
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memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
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51
hw/rc4030.c
51
hw/rc4030.c
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@ -95,6 +95,9 @@ typedef struct rc4030State
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qemu_irq timer_irq;
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qemu_irq timer_irq;
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qemu_irq jazz_bus_irq;
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qemu_irq jazz_bus_irq;
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MemoryRegion iomem_chipset;
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MemoryRegion iomem_jazzio;
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} rc4030State;
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} rc4030State;
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static void set_next_tick(rc4030State *s)
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static void set_next_tick(rc4030State *s)
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@ -419,16 +422,12 @@ static void rc4030_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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rc4030_writel(opaque, addr & ~0x3, val);
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rc4030_writel(opaque, addr & ~0x3, val);
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}
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}
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static CPUReadMemoryFunc * const rc4030_read[3] = {
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static const MemoryRegionOps rc4030_ops = {
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rc4030_readb,
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.old_mmio = {
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rc4030_readw,
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.read = { rc4030_readb, rc4030_readw, rc4030_readl, },
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rc4030_readl,
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.write = { rc4030_writeb, rc4030_writew, rc4030_writel, },
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};
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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static CPUWriteMemoryFunc * const rc4030_write[3] = {
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rc4030_writeb,
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rc4030_writew,
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rc4030_writel,
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};
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};
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static void update_jazz_irq(rc4030State *s)
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static void update_jazz_irq(rc4030State *s)
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@ -573,16 +572,12 @@ static void jazzio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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jazzio_writew(opaque, addr + 2, (val >> 16) & 0xffff);
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jazzio_writew(opaque, addr + 2, (val >> 16) & 0xffff);
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}
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}
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static CPUReadMemoryFunc * const jazzio_read[3] = {
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static const MemoryRegionOps jazzio_ops = {
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jazzio_readb,
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.old_mmio = {
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jazzio_readw,
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.read = { jazzio_readb, jazzio_readw, jazzio_readl, },
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jazzio_readl,
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.write = { jazzio_writeb, jazzio_writew, jazzio_writel, },
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};
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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static CPUWriteMemoryFunc * const jazzio_write[3] = {
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jazzio_writeb,
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jazzio_writew,
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jazzio_writel,
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};
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};
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static void rc4030_reset(void *opaque)
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static void rc4030_reset(void *opaque)
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@ -801,10 +796,10 @@ static rc4030_dma *rc4030_allocate_dmas(void *opaque, int n)
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}
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}
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void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
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void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
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qemu_irq **irqs, rc4030_dma **dmas)
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qemu_irq **irqs, rc4030_dma **dmas,
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MemoryRegion *sysmem)
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{
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{
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rc4030State *s;
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rc4030State *s;
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int s_chipset, s_jazzio;
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s = g_malloc0(sizeof(rc4030State));
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s = g_malloc0(sizeof(rc4030State));
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@ -819,12 +814,12 @@ void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
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register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s);
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register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s);
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rc4030_reset(s);
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rc4030_reset(s);
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s_chipset = cpu_register_io_memory(rc4030_read, rc4030_write, s,
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memory_region_init_io(&s->iomem_chipset, &rc4030_ops, s,
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DEVICE_NATIVE_ENDIAN);
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"rc4030.chipset", 0x300);
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cpu_register_physical_memory(0x80000000, 0x300, s_chipset);
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memory_region_add_subregion(sysmem, 0x80000000, &s->iomem_chipset);
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s_jazzio = cpu_register_io_memory(jazzio_read, jazzio_write, s,
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memory_region_init_io(&s->iomem_jazzio, &jazzio_ops, s,
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DEVICE_NATIVE_ENDIAN);
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"rc4030.jazzio", 0x00001000);
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cpu_register_physical_memory(0xf0000000, 0x00001000, s_jazzio);
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memory_region_add_subregion(sysmem, 0xf0000000, &s->iomem_jazzio);
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return s;
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return s;
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}
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}
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