cris: Add interrupt signals to the CPU device
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
parent
d66433ffdc
commit
3065839c72
|
@ -152,6 +152,21 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
|
||||||
ccc->parent_realize(dev, errp);
|
ccc->parent_realize(dev, errp);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifndef CONFIG_USER_ONLY
|
||||||
|
static void cris_cpu_set_irq(void *opaque, int irq, int level)
|
||||||
|
{
|
||||||
|
CRISCPU *cpu = opaque;
|
||||||
|
CPUState *cs = CPU(cpu);
|
||||||
|
int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
|
||||||
|
|
||||||
|
if (level) {
|
||||||
|
cpu_interrupt(cs, type);
|
||||||
|
} else {
|
||||||
|
cpu_reset_interrupt(cs, type);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
static void cris_cpu_initfn(Object *obj)
|
static void cris_cpu_initfn(Object *obj)
|
||||||
{
|
{
|
||||||
CPUState *cs = CPU(obj);
|
CPUState *cs = CPU(obj);
|
||||||
|
@ -165,6 +180,11 @@ static void cris_cpu_initfn(Object *obj)
|
||||||
|
|
||||||
env->pregs[PR_VR] = ccc->vr;
|
env->pregs[PR_VR] = ccc->vr;
|
||||||
|
|
||||||
|
#ifndef CONFIG_USER_ONLY
|
||||||
|
/* IRQ and NMI lines. */
|
||||||
|
qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
|
||||||
|
#endif
|
||||||
|
|
||||||
if (tcg_enabled() && !tcg_initialized) {
|
if (tcg_enabled() && !tcg_initialized) {
|
||||||
tcg_initialized = true;
|
tcg_initialized = true;
|
||||||
if (env->pregs[PR_VR] < 32) {
|
if (env->pregs[PR_VR] < 32) {
|
||||||
|
|
|
@ -42,6 +42,10 @@
|
||||||
/* CRIS-specific interrupt pending bits. */
|
/* CRIS-specific interrupt pending bits. */
|
||||||
#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
|
#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
|
||||||
|
|
||||||
|
/* CRUS CPU device objects interrupt lines. */
|
||||||
|
#define CRIS_CPU_IRQ 0
|
||||||
|
#define CRIS_CPU_NMI 1
|
||||||
|
|
||||||
/* Register aliases. R0 - R15 */
|
/* Register aliases. R0 - R15 */
|
||||||
#define R_FP 8
|
#define R_FP 8
|
||||||
#define R_SP 14
|
#define R_SP 14
|
||||||
|
|
Loading…
Reference in New Issue