i8254: Pass alternative IRQ output object on initialization
HPET legacy emulation will require control over the PIT IRQ output. To enable this, add support for an alternative IRQ output object to the PIT factory function. If the isa_irq number is < 0, this object will be used. This also removes the IRQ number property from the PIT class as we now use a generic GPIO output pin that is connected by the factory function. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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b1277b03d4
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319ba9f527
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@ -73,7 +73,7 @@ static void clipper_init(ram_addr_t ram_size,
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clipper_pci_map_irq);
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clipper_pci_map_irq);
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rtc_init(isa_bus, 1980, rtc_irq);
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rtc_init(isa_bus, 1980, rtc_irq);
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pit_init(isa_bus, 0x40, 0);
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pit_init(isa_bus, 0x40, 0, NULL);
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isa_create_simple(isa_bus, "i8042");
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isa_create_simple(isa_bus, "i8042");
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/* VGA setup. Don't bother loading the bios. */
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/* VGA setup. Don't bother loading the bios. */
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@ -192,7 +192,7 @@ static void i82378_init(DeviceState *dev, I82378State *s)
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isa_bus_irqs(isabus, s->i8259);
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isa_bus_irqs(isabus, s->i8259);
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/* 1 82C54 (pit) */
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/* 1 82C54 (pit) */
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pit = pit_init(isabus, 0x40, 0);
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pit = pit_init(isabus, 0x40, 0, NULL);
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/* speaker */
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/* speaker */
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pcspk_init(pit);
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pcspk_init(pit);
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@ -57,7 +57,6 @@ typedef struct PITChannelState {
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typedef struct PITState {
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typedef struct PITState {
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ISADevice dev;
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ISADevice dev;
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MemoryRegion ioports;
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MemoryRegion ioports;
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uint32_t irq;
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uint32_t iobase;
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uint32_t iobase;
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PITChannelState channels[3];
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PITChannelState channels[3];
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} PITState;
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} PITState;
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@ -532,7 +531,7 @@ static int pit_initfn(ISADevice *dev)
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s = &pit->channels[0];
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s = &pit->channels[0];
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/* the timer 0 is connected to an IRQ */
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/* the timer 0 is connected to an IRQ */
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s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s);
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s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s);
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s->irq = isa_get_irq(dev, pit->irq);
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qdev_init_gpio_out(&dev->qdev, &s->irq, 1);
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memory_region_init_io(&pit->ioports, &pit_ioport_ops, pit, "pit", 4);
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memory_region_init_io(&pit->ioports, &pit_ioport_ops, pit, "pit", 4);
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isa_register_ioport(dev, &pit->ioports, pit->iobase);
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isa_register_ioport(dev, &pit->ioports, pit->iobase);
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@ -543,7 +542,6 @@ static int pit_initfn(ISADevice *dev)
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}
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}
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static Property pit_properties[] = {
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static Property pit_properties[] = {
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DEFINE_PROP_UINT32("irq", PITState, irq, -1),
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DEFINE_PROP_HEX32("iobase", PITState, iobase, -1),
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DEFINE_PROP_HEX32("iobase", PITState, iobase, -1),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -30,14 +30,16 @@
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#define PIT_FREQ 1193182
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#define PIT_FREQ 1193182
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static inline ISADevice *pit_init(ISABus *bus, int base, int irq)
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static inline ISADevice *pit_init(ISABus *bus, int base, int isa_irq,
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qemu_irq alt_irq)
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{
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{
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ISADevice *dev;
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ISADevice *dev;
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dev = isa_create(bus, "isa-pit");
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dev = isa_create(bus, "isa-pit");
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qdev_prop_set_uint32(&dev->qdev, "iobase", base);
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qdev_prop_set_uint32(&dev->qdev, "iobase", base);
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qdev_prop_set_uint32(&dev->qdev, "irq", irq);
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qdev_init_nofail(&dev->qdev);
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qdev_init_nofail(&dev->qdev);
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qdev_connect_gpio_out(&dev->qdev, 0,
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isa_irq >= 0 ? isa_get_irq(dev, isa_irq) : alt_irq);
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return dev;
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return dev;
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}
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}
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@ -364,7 +364,7 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
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smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
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smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
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/* init other devices */
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/* init other devices */
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pit = pit_init(isa_bus, 0x40, 0);
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pit = pit_init(isa_bus, 0x40, 0, NULL);
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cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
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cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
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DMA_init(0, cpu_exit_irq);
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DMA_init(0, cpu_exit_irq);
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@ -192,7 +192,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
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isa_bus_irqs(isa_bus, i8259);
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isa_bus_irqs(isa_bus, i8259);
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cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
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cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
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DMA_init(0, cpu_exit_irq);
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DMA_init(0, cpu_exit_irq);
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pit = pit_init(isa_bus, 0x40, 0);
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pit = pit_init(isa_bus, 0x40, 0, NULL);
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pcspk_init(pit);
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pcspk_init(pit);
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/* ISA IO space at 0x90000000 */
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/* ISA IO space at 0x90000000 */
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@ -970,7 +970,7 @@ void mips_malta_init (ram_addr_t ram_size,
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isa_get_irq(NULL, 9), NULL, NULL, 0);
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isa_get_irq(NULL, 9), NULL, NULL, 0);
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/* TODO: Populate SPD eeprom data. */
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/* TODO: Populate SPD eeprom data. */
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smbus_eeprom_init(smbus, 8, NULL, 0);
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smbus_eeprom_init(smbus, 8, NULL, 0);
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pit = pit_init(isa_bus, 0x40, 0);
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pit = pit_init(isa_bus, 0x40, 0, NULL);
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cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
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cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
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DMA_init(0, cpu_exit_irq);
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DMA_init(0, cpu_exit_irq);
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@ -270,7 +270,7 @@ void mips_r4k_init (ram_addr_t ram_size,
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isa_mmio_init(0x14000000, 0x00010000);
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isa_mmio_init(0x14000000, 0x00010000);
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isa_mem_base = 0x10000000;
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isa_mem_base = 0x10000000;
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pit = pit_init(isa_bus, 0x40, 0);
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pit = pit_init(isa_bus, 0x40, 0, NULL);
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for(i = 0; i < MAX_SERIAL_PORTS; i++) {
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for(i = 0; i < MAX_SERIAL_PORTS; i++) {
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if (serial_hds[i]) {
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if (serial_hds[i]) {
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2
hw/pc.c
2
hw/pc.c
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@ -1162,7 +1162,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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qemu_register_boot_set(pc_boot_set, *rtc_state);
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qemu_register_boot_set(pc_boot_set, *rtc_state);
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pit = pit_init(isa_bus, 0x40, 0);
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pit = pit_init(isa_bus, 0x40, 0, NULL);
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pcspk_init(pit);
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pcspk_init(pit);
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for(i = 0; i < MAX_SERIAL_PORTS; i++) {
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for(i = 0; i < MAX_SERIAL_PORTS; i++) {
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