target-i386: Remove gen_op_mov*_A0_im
Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -252,18 +252,6 @@ static void gen_update_cc_op(DisasContext *s)
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}
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}
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static inline void gen_op_movl_A0_im(uint32_t val)
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{
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tcg_gen_movi_tl(cpu_A0, val);
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}
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#ifdef TARGET_X86_64
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static inline void gen_op_movq_A0_im(int64_t val)
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{
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tcg_gen_movi_tl(cpu_A0, val);
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}
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#endif
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static inline void gen_movtl_T0_im(target_ulong val)
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{
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tcg_gen_movi_tl(cpu_T[0], val);
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@ -2046,7 +2034,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm)
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if (rm == 6) {
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disp = cpu_lduw_code(env, s->pc);
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s->pc += 2;
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gen_op_movl_A0_im(disp);
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tcg_gen_movi_tl(cpu_A0, disp);
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rm = 0; /* avoid SS override */
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goto no_rm;
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} else {
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@ -5619,7 +5607,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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if (s->aflag == 2) {
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offset_addr = cpu_ldq_code(env, s->pc);
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s->pc += 8;
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gen_op_movq_A0_im(offset_addr);
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} else
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#endif
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{
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@ -5628,8 +5615,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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} else {
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offset_addr = insn_get(env, s, MO_16);
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}
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gen_op_movl_A0_im(offset_addr);
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}
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tcg_gen_movi_tl(cpu_A0, offset_addr);
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gen_add_A0_ds_seg(s);
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if ((b & 2) == 0) {
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gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
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