Parallel port reset
Attached patch adds a reset handler to parallel port, so it gets correct register values after a reset. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5942 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -418,8 +418,10 @@ static uint32_t parallel_ioport_ecp_read(void *opaque, uint32_t addr)
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return ret;
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}
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static void parallel_reset(ParallelState *s, qemu_irq irq, CharDriverState *chr)
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static void parallel_reset(void *opaque)
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{
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ParallelState *s = opaque;
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s->datar = ~0;
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s->dataw = ~0;
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s->status = PARA_STS_BUSY;
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@ -430,9 +432,7 @@ static void parallel_reset(ParallelState *s, qemu_irq irq, CharDriverState *chr)
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s->control = PARA_CTR_SELECT;
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s->control |= PARA_CTR_INIT;
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s->control |= 0xc0;
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s->irq = irq;
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s->irq_pending = 0;
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s->chr = chr;
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s->hw_driver = 0;
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s->epp_timeout = 0;
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s->last_read_offset = ~0U;
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@ -447,7 +447,10 @@ ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr)
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s = qemu_mallocz(sizeof(ParallelState));
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if (!s)
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return NULL;
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parallel_reset(s, irq, chr);
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s->irq = irq;
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s->chr = chr;
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parallel_reset(s);
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qemu_register_reset(parallel_reset, s);
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if (qemu_chr_ioctl(chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
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s->hw_driver = 1;
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@ -538,8 +541,11 @@ ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq
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s = qemu_mallocz(sizeof(ParallelState));
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if (!s)
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return NULL;
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parallel_reset(s, irq, chr);
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s->irq = irq;
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s->chr = chr;
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s->it_shift = it_shift;
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parallel_reset(s);
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qemu_register_reset(parallel_reset, s);
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io_sw = cpu_register_io_memory(0, parallel_mm_read_sw, parallel_mm_write_sw, s);
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cpu_register_physical_memory(base, 8 << it_shift, io_sw);
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