target/arm: Pass in pc to thumb_insn_is_16bit
This function is used in two different contexts, and it will be clearer if the function is given the address to which it applies. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190807045335.1361-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -9246,11 +9246,11 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
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}
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}
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}
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}
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static bool thumb_insn_is_16bit(DisasContext *s, uint32_t insn)
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static bool thumb_insn_is_16bit(DisasContext *s, uint32_t pc, uint32_t insn)
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{
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{
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/* Return true if this is a 16 bit instruction. We must be precise
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/*
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* about this (matching the decode). We assume that s->pc still
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* Return true if this is a 16 bit instruction. We must be precise
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* points to the first 16 bits of the insn.
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* about this (matching the decode).
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*/
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*/
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if ((insn >> 11) < 0x1d) {
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if ((insn >> 11) < 0x1d) {
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/* Definitely a 16-bit instruction */
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/* Definitely a 16-bit instruction */
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@ -9270,7 +9270,7 @@ static bool thumb_insn_is_16bit(DisasContext *s, uint32_t insn)
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return false;
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return false;
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}
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}
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if ((insn >> 11) == 0x1e && s->pc - s->page_start < TARGET_PAGE_SIZE - 3) {
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if ((insn >> 11) == 0x1e && pc - s->page_start < TARGET_PAGE_SIZE - 3) {
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/* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix
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/* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix
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* is not on the next page; we merge this into a 32-bit
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* is not on the next page; we merge this into a 32-bit
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* insn.
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* insn.
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@ -11809,7 +11809,7 @@ static bool insn_crosses_page(CPUARMState *env, DisasContext *s)
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*/
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*/
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uint16_t insn = arm_lduw_code(env, s->pc, s->sctlr_b);
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uint16_t insn = arm_lduw_code(env, s->pc, s->sctlr_b);
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return !thumb_insn_is_16bit(s, insn);
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return !thumb_insn_is_16bit(s, s->pc, insn);
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}
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}
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static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
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static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
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@ -12108,7 +12108,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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}
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}
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insn = arm_lduw_code(env, dc->pc, dc->sctlr_b);
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insn = arm_lduw_code(env, dc->pc, dc->sctlr_b);
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is_16bit = thumb_insn_is_16bit(dc, insn);
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is_16bit = thumb_insn_is_16bit(dc, dc->pc, insn);
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dc->pc += 2;
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dc->pc += 2;
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if (!is_16bit) {
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if (!is_16bit) {
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uint32_t insn2 = arm_lduw_code(env, dc->pc, dc->sctlr_b);
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uint32_t insn2 = arm_lduw_code(env, dc->pc, dc->sctlr_b);
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