vmxcap: add tertiary execution controls

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2022-05-11 18:39:12 +02:00
parent 7adb75d6be
commit 333dbac358
1 changed files with 17 additions and 0 deletions

View File

@ -23,6 +23,7 @@ MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
MSR_IA32_VMX_VMFUNC = 0x491
MSR_IA32_VMX_PROCBASED_CTLS3 = 0x492
class msr(object):
def __init__(self):
@ -71,6 +72,13 @@ class Control(object):
s = 'yes'
print(' %-40s %s' % (self.bits[bit], s))
# All 64 bits in the tertiary controls MSR are allowed-1
class Allowed1Control(Control):
def read2(self, nr):
m = msr()
val = m.read(nr, 0)
return (0, val)
class Misc(object):
def __init__(self, name, bits, msr):
self.name = name
@ -135,6 +143,7 @@ controls = [
12: 'RDTSC exiting',
15: 'CR3-load exiting',
16: 'CR3-store exiting',
17: 'Activate tertiary controls',
19: 'CR8-load exiting',
20: 'CR8-store exiting',
21: 'Use TPR shadow',
@ -186,6 +195,14 @@ controls = [
cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
),
Allowed1Control(
name = 'tertiary processor-based controls',
bits = {
4: 'Enable IPI virtualization'
},
cap_msr = MSR_IA32_VMX_PROCBASED_CTLS3,
),
Control(
name = 'VM-Exit controls',
bits = {