macio: move ESCC device within the macio device
Now that the ESCC device is instantiated directly via qdev, move it to within the macio device and wire up the IRQs and memory regions using the sysbus API. This enables to remove the now-obsolete escc_mem parameter to the macio_init() function. (Note this patch also contains small touch-ups to the formatting in macio_escc_legacy_setup() and ppc_heathrow_init() in order to keep checkpatch happy) Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland
David Gibson
parent
a504b9b91a
commit
343bd85a40
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@ -43,8 +43,8 @@ typedef struct MacIOState
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MemoryRegion bar;
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CUDAState cuda;
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DBDMAState dbdma;
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ESCCState escc;
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MemoryRegion *pic_mem;
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MemoryRegion *escc_mem;
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uint64_t frequency;
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} MacIOState;
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@ -56,7 +56,7 @@ typedef struct OldWorldMacIOState {
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[5];
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qemu_irq irqs[7];
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MacIONVRAMState nvram;
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MACIOIDEState ide[2];
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@ -69,7 +69,7 @@ typedef struct NewWorldMacIOState {
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[5];
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qemu_irq irqs[7];
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MACIOIDEState ide[2];
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} NewWorldMacIOState;
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@ -84,10 +84,12 @@ typedef struct NewWorldMacIOState {
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*
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* Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
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*/
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static void macio_escc_legacy_setup(MacIOState *macio_state)
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static void macio_escc_legacy_setup(MacIOState *s)
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{
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ESCCState *escc = ESCC(&s->escc);
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SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
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MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
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MemoryRegion *bar = &macio_state->bar;
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MemoryRegion *bar = &s->bar;
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int i;
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static const int maps[] = {
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0x00, 0x00, /* Command B */
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@ -102,25 +104,26 @@ static void macio_escc_legacy_setup(MacIOState *macio_state)
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0xb0, 0xb0, /* Detect AB */
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};
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memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
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memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
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for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
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MemoryRegion *port = g_new(MemoryRegion, 1);
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memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
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macio_state->escc_mem, maps[i+1], 0x2);
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memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
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sysbus_mmio_get_region(sbd, 0),
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maps[i + 1], 0x2);
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memory_region_add_subregion(escc_legacy, maps[i], port);
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}
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memory_region_add_subregion(bar, 0x12000, escc_legacy);
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}
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static void macio_bar_setup(MacIOState *macio_state)
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static void macio_bar_setup(MacIOState *s)
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{
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MemoryRegion *bar = &macio_state->bar;
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ESCCState *escc = ESCC(&s->escc);
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SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
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MemoryRegion *bar = &s->bar;
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if (macio_state->escc_mem) {
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memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
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macio_escc_legacy_setup(macio_state);
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}
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memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
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macio_escc_legacy_setup(s);
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}
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static void macio_common_realize(PCIDevice *d, Error **errp)
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@ -147,6 +150,12 @@ static void macio_common_realize(PCIDevice *d, Error **errp)
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memory_region_add_subregion(&s->bar, 0x16000,
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sysbus_mmio_get_region(sysbus_dev, 0));
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object_property_set_bool(OBJECT(&s->escc), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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macio_bar_setup(s);
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pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
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}
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@ -185,6 +194,10 @@ static void macio_oldworld_realize(PCIDevice *d, Error **errp)
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
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sysbus_dev = SYS_BUS_DEVICE(&s->escc);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
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sysbus_connect_irq(sysbus_dev, 1, os->irqs[cur_irq++]);
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object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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@ -297,6 +310,10 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
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sysbus_dev = SYS_BUS_DEVICE(&s->escc);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
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sysbus_connect_irq(sysbus_dev, 1, ns->irqs[cur_irq++]);
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if (s->pic_mem) {
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/* OpenPIC */
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memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
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@ -347,6 +364,17 @@ static void macio_instance_init(Object *obj)
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object_initialize(&s->dbdma, sizeof(s->dbdma), TYPE_MAC_DBDMA);
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qdev_set_parent_bus(DEVICE(&s->dbdma), sysbus_get_default());
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object_property_add_child(obj, "dbdma", OBJECT(&s->dbdma), NULL);
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object_initialize(&s->escc, sizeof(s->escc), TYPE_ESCC);
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qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
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qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
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qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
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qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hds[0]);
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qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hds[1]);
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qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
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qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
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qdev_set_parent_bus(DEVICE(&s->escc), sysbus_get_default());
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object_property_add_child(obj, "escc", OBJECT(&s->escc), NULL);
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}
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static const VMStateDescription vmstate_macio_oldworld = {
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@ -444,13 +472,11 @@ static void macio_register_types(void)
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type_init(macio_register_types)
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void macio_init(PCIDevice *d,
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MemoryRegion *pic_mem,
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MemoryRegion *escc_mem)
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MemoryRegion *pic_mem)
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{
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MacIOState *macio_state = MACIO(d);
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macio_state->pic_mem = pic_mem;
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macio_state->escc_mem = escc_mem;
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/* Note: this code is strongly inspirated from the corresponding code
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in PearPC */
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qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "timebase-frequency",
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@ -76,8 +76,7 @@ void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
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void macio_ide_register_dma(MACIOIDEState *ide);
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void macio_init(PCIDevice *dev,
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MemoryRegion *pic_mem,
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MemoryRegion *escc_mem);
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MemoryRegion *pic_mem);
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/* Heathrow PIC */
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qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
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@ -159,8 +159,7 @@ static void ppc_core99_init(MachineState *machine)
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MacIONVRAMState *nvr;
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int bios_size, ndrv_size;
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uint8_t *ndrv_file;
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MemoryRegion *pic_mem, *escc_mem;
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MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
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MemoryRegion *pic_mem;
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int ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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@ -368,36 +367,18 @@ static void ppc_core99_init(MachineState *machine)
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tbfreq = TBFREQ;
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}
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/* init basic PC hardware */
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dev = qdev_create(NULL, TYPE_ESCC);
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qdev_prop_set_uint32(dev, "disabled", 0);
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qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
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qdev_prop_set_uint32(dev, "it_shift", 4);
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qdev_prop_set_chr(dev, "chrA", serial_hds[0]);
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qdev_prop_set_chr(dev, "chrB", serial_hds[1]);
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qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
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qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_connect_irq(s, 0, pic[0x24]);
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sysbus_connect_irq(s, 1, pic[0x25]);
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escc_mem = &ESCC(s)->mmio;
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memory_region_init_alias(escc_bar, NULL, "escc-bar",
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escc_mem, 0, memory_region_size(escc_mem));
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/* MacIO */
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macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO);
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dev = DEVICE(macio);
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qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */
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qdev_connect_gpio_out(dev, 1, pic[0x0d]); /* IDE */
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qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE DMA */
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qdev_connect_gpio_out(dev, 3, pic[0x0e]); /* IDE */
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qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE DMA */
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qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */
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qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */
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qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */
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qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */
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qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */
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qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */
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qdev_prop_set_uint64(dev, "frequency", tbfreq);
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macio_init(macio, pic_mem, escc_bar);
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macio_init(macio, pic_mem);
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/* We only emulate 2 out of 3 IDE controllers for now */
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ide_drive_get(hd, ARRAY_SIZE(hd));
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@ -99,12 +99,10 @@ static void ppc_heathrow_init(MachineState *machine)
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int bios_size, ndrv_size;
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uint8_t *ndrv_file;
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MemoryRegion *pic_mem;
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MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
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uint16_t ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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uint64_t tbfreq;
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SysBusDevice *s;
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linux_boot = (kernel_filename != NULL);
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@ -265,40 +263,24 @@ static void ppc_heathrow_init(MachineState *machine)
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get_system_io());
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pci_vga_init(pci_bus);
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dev = qdev_create(NULL, TYPE_ESCC);
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qdev_prop_set_uint32(dev, "disabled", 0);
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qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
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qdev_prop_set_uint32(dev, "it_shift", 4);
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qdev_prop_set_chr(dev, "chrA", serial_hds[0]);
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qdev_prop_set_chr(dev, "chrB", serial_hds[1]);
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qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
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qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_connect_irq(s, 0, pic[0x10]);
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sysbus_connect_irq(s, 1, pic[0x0f]);
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escc_mem = &ESCC(s)->mmio;
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memory_region_init_alias(escc_bar, NULL, "escc-bar",
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escc_mem, 0, memory_region_size(escc_mem));
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for(i = 0; i < nb_nics; i++)
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for (i = 0; i < nb_nics; i++) {
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pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
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}
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ide_drive_get(hd, ARRAY_SIZE(hd));
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/* MacIO */
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macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
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dev = DEVICE(macio);
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qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */
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qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */
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qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */
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qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */
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qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */
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qdev_connect_gpio_out(dev, 1, pic[0x10]); /* ESCC-B */
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qdev_connect_gpio_out(dev, 2, pic[0x0F]); /* ESCC-A */
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qdev_connect_gpio_out(dev, 3, pic[0x0D]); /* IDE-0 */
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qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE-0 DMA */
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qdev_connect_gpio_out(dev, 5, pic[0x0E]); /* IDE-1 */
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qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE-1 DMA */
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qdev_prop_set_uint64(dev, "frequency", tbfreq);
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macio_init(macio, pic_mem, escc_bar);
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macio_init(macio, pic_mem);
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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"ide[0]"));
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