vt82c686: Make vt82c686-pm an I/O tracing region
Previously just an empty RAM region was mapped on realize, now we add an empty io range logging access instead. I think the pm timer should be hooked up here but not sure guests need it. PMON on fuloong2e sets a base address but does not seem to enable region; the pegasos2 firmware pokes some regs but continues anyway so don't know if anything would make use of these facilities. Therefore this is just a clean up of previous state for now and not intending to fully implement missing functionality which could be done later if some guests need it. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu> [PMD: Split original patch, this is part 1/4 (make 'vt82c686-pm' an I/O tracing region)] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -17,5 +17,7 @@ apm_io_write(uint8_t addr, uint8_t val) "write addr=0x%x val=0x%02x"
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# vt82c686.c
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# vt82c686.c
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via_isa_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
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via_isa_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
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via_pm_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
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via_pm_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
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via_pm_io_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
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via_pm_io_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
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via_superio_read(uint8_t addr, uint8_t val) "addr 0x%x val 0x%x"
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via_superio_read(uint8_t addr, uint8_t val) "addr 0x%x val 0x%x"
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via_superio_write(uint8_t addr, uint32_t val) "addr 0x%x val 0x%x"
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via_superio_write(uint8_t addr, uint32_t val) "addr 0x%x val 0x%x"
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@ -102,6 +102,27 @@ static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len)
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}
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}
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}
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}
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static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size)
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{
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trace_via_pm_io_write(addr, data, size);
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}
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static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size)
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{
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trace_via_pm_io_read(addr, 0, size);
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return 0;
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}
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static const MemoryRegionOps pm_io_ops = {
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.read = pm_io_read,
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.write = pm_io_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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static void pm_update_sci(VT686PMState *s)
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static void pm_update_sci(VT686PMState *s)
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{
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{
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int sci_level, pmsts;
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int sci_level, pmsts;
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@ -154,9 +175,10 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp)
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apm_init(dev, &s->apm, NULL, s);
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apm_init(dev, &s->apm, NULL, s);
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memory_region_init(&s->io, OBJECT(dev), "vt82c686-pm", 64);
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memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s,
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"vt82c686-pm", 64);
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memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io);
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memory_region_set_enabled(&s->io, false);
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memory_region_set_enabled(&s->io, false);
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memory_region_add_subregion(get_system_io(), 0, &s->io);
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acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io);
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acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io);
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acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io);
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acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io);
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