target: Use forward declared type instead of structure type
The CPU / CPU state are forward declared. $ git grep -E 'struct [A-Za-z]+CPU\ \*' target/arm/hvf_arm.h:16:void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu); target/openrisc/cpu.h:234: int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu, target/openrisc/cpu.h:238: int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu, $ git grep -E 'struct CPU[A-Za-z0-9]+State\ \*' target/mips/internal.h:137: int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot, target/mips/internal.h:139: void (*helper_tlbwi)(struct CPUMIPSState *env); target/mips/internal.h:140: void (*helper_tlbwr)(struct CPUMIPSState *env); target/mips/internal.h:141: void (*helper_tlbp)(struct CPUMIPSState *env); target/mips/internal.h:142: void (*helper_tlbr)(struct CPUMIPSState *env); target/mips/internal.h:143: void (*helper_tlbinv)(struct CPUMIPSState *env); target/mips/internal.h:144: void (*helper_tlbinvf)(struct CPUMIPSState *env); target/xtensa/cpu.h:347: struct CPUXtensaState *env; ... Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-12-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé
parent
a01bab6507
commit
3686119875
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@ -13,6 +13,6 @@
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#include "cpu.h"
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void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu);
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void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu);
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#endif
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@ -171,12 +171,12 @@ void write_val_to_reg(target_ulong reg_ptr, target_ulong val, int size)
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}
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}
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static bool is_host_reg(struct CPUX86State *env, target_ulong ptr)
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static bool is_host_reg(CPUX86State *env, target_ulong ptr)
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{
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return (ptr - (target_ulong)&env->regs[0]) < sizeof(env->regs);
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}
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void write_val_ext(struct CPUX86State *env, target_ulong ptr, target_ulong val, int size)
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void write_val_ext(CPUX86State *env, target_ulong ptr, target_ulong val, int size)
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{
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if (is_host_reg(env, ptr)) {
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write_val_to_reg(ptr, val, size);
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@ -185,14 +185,14 @@ void write_val_ext(struct CPUX86State *env, target_ulong ptr, target_ulong val,
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vmx_write_mem(env_cpu(env), ptr, &val, size);
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}
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uint8_t *read_mmio(struct CPUX86State *env, target_ulong ptr, int bytes)
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uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes)
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{
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vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, ptr, bytes);
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return env->hvf_mmio_buf;
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}
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target_ulong read_val_ext(struct CPUX86State *env, target_ulong ptr, int size)
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target_ulong read_val_ext(CPUX86State *env, target_ulong ptr, int size)
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{
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target_ulong val;
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uint8_t *mmio_ptr;
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@ -222,7 +222,7 @@ target_ulong read_val_ext(struct CPUX86State *env, target_ulong ptr, int size)
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return val;
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}
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static void fetch_operands(struct CPUX86State *env, struct x86_decode *decode,
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static void fetch_operands(CPUX86State *env, struct x86_decode *decode,
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int n, bool val_op0, bool val_op1, bool val_op2)
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{
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int i;
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@ -261,7 +261,7 @@ static void fetch_operands(struct CPUX86State *env, struct x86_decode *decode,
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}
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}
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static void exec_mov(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_mov(CPUX86State *env, struct x86_decode *decode)
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{
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fetch_operands(env, decode, 2, false, true, false);
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write_val_ext(env, decode->op[0].ptr, decode->op[1].val,
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@ -270,49 +270,49 @@ static void exec_mov(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_add(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_add(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, +, SET_FLAGS_OSZAPC_ADD, true);
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env->eip += decode->len;
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}
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static void exec_or(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_or(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, |, SET_FLAGS_OSZAPC_LOGIC, true);
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env->eip += decode->len;
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}
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static void exec_adc(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_adc(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, +get_CF(env)+, SET_FLAGS_OSZAPC_ADD, true);
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env->eip += decode->len;
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}
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static void exec_sbb(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_sbb(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, -get_CF(env)-, SET_FLAGS_OSZAPC_SUB, true);
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env->eip += decode->len;
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}
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static void exec_and(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_and(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, &, SET_FLAGS_OSZAPC_LOGIC, true);
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env->eip += decode->len;
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}
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static void exec_sub(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_sub(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, -, SET_FLAGS_OSZAPC_SUB, true);
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env->eip += decode->len;
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}
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static void exec_xor(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_xor(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, ^, SET_FLAGS_OSZAPC_LOGIC, true);
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env->eip += decode->len;
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}
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static void exec_neg(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_neg(CPUX86State *env, struct x86_decode *decode)
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{
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/*EXEC_2OP_FLAGS_CMD(env, decode, -, SET_FLAGS_OSZAPC_SUB, false);*/
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int32_t val;
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@ -335,13 +335,13 @@ static void exec_neg(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_cmp(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_cmp(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, -, SET_FLAGS_OSZAPC_SUB, false);
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env->eip += decode->len;
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}
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static void exec_inc(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_inc(CPUX86State *env, struct x86_decode *decode)
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{
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decode->op[1].type = X86_VAR_IMMEDIATE;
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decode->op[1].val = 0;
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@ -351,7 +351,7 @@ static void exec_inc(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_dec(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_dec(CPUX86State *env, struct x86_decode *decode)
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{
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decode->op[1].type = X86_VAR_IMMEDIATE;
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decode->op[1].val = 0;
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@ -360,13 +360,13 @@ static void exec_dec(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_tst(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_tst(CPUX86State *env, struct x86_decode *decode)
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{
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EXEC_2OP_FLAGS_CMD(env, decode, &, SET_FLAGS_OSZAPC_LOGIC, false);
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env->eip += decode->len;
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}
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static void exec_not(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_not(CPUX86State *env, struct x86_decode *decode)
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{
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fetch_operands(env, decode, 1, true, false, false);
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@ -375,7 +375,7 @@ static void exec_not(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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void exec_movzx(struct CPUX86State *env, struct x86_decode *decode)
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void exec_movzx(CPUX86State *env, struct x86_decode *decode)
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{
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int src_op_size;
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int op_size = decode->operand_size;
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@ -395,7 +395,7 @@ void exec_movzx(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_out(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_out(CPUX86State *env, struct x86_decode *decode)
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{
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switch (decode->opcode[0]) {
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case 0xe6:
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@ -419,7 +419,7 @@ static void exec_out(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_in(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_in(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong val = 0;
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switch (decode->opcode[0]) {
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@ -455,7 +455,7 @@ static void exec_in(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static inline void string_increment_reg(struct CPUX86State *env, int reg,
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static inline void string_increment_reg(CPUX86State *env, int reg,
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struct x86_decode *decode)
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{
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target_ulong val = read_reg(env, reg, decode->addressing_size);
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@ -467,8 +467,8 @@ static inline void string_increment_reg(struct CPUX86State *env, int reg,
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write_reg(env, reg, val, decode->addressing_size);
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}
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static inline void string_rep(struct CPUX86State *env, struct x86_decode *decode,
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void (*func)(struct CPUX86State *env,
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static inline void string_rep(CPUX86State *env, struct x86_decode *decode,
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void (*func)(CPUX86State *env,
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struct x86_decode *ins), int rep)
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{
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target_ulong rcx = read_reg(env, R_ECX, decode->addressing_size);
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@ -484,7 +484,7 @@ static inline void string_rep(struct CPUX86State *env, struct x86_decode *decode
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}
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}
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static void exec_ins_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_ins_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong addr = linear_addr_size(env_cpu(env), RDI(env),
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decode->addressing_size, R_ES);
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@ -497,7 +497,7 @@ static void exec_ins_single(struct CPUX86State *env, struct x86_decode *decode)
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string_increment_reg(env, R_EDI, decode);
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}
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static void exec_ins(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_ins(CPUX86State *env, struct x86_decode *decode)
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{
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if (decode->rep) {
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string_rep(env, decode, exec_ins_single, 0);
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@ -508,7 +508,7 @@ static void exec_ins(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_outs_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_outs_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong addr = decode_linear_addr(env, decode, RSI(env), R_DS);
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@ -520,7 +520,7 @@ static void exec_outs_single(struct CPUX86State *env, struct x86_decode *decode)
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string_increment_reg(env, R_ESI, decode);
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}
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static void exec_outs(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_outs(CPUX86State *env, struct x86_decode *decode)
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{
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if (decode->rep) {
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string_rep(env, decode, exec_outs_single, 0);
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@ -531,7 +531,7 @@ static void exec_outs(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_movs_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_movs_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong src_addr;
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target_ulong dst_addr;
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@ -548,7 +548,7 @@ static void exec_movs_single(struct CPUX86State *env, struct x86_decode *decode)
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string_increment_reg(env, R_EDI, decode);
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}
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static void exec_movs(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_movs(CPUX86State *env, struct x86_decode *decode)
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{
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if (decode->rep) {
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string_rep(env, decode, exec_movs_single, 0);
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@ -559,7 +559,7 @@ static void exec_movs(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_cmps_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_cmps_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong src_addr;
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target_ulong dst_addr;
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@ -579,7 +579,7 @@ static void exec_cmps_single(struct CPUX86State *env, struct x86_decode *decode)
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string_increment_reg(env, R_EDI, decode);
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}
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static void exec_cmps(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_cmps(CPUX86State *env, struct x86_decode *decode)
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{
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if (decode->rep) {
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string_rep(env, decode, exec_cmps_single, decode->rep);
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@ -590,7 +590,7 @@ static void exec_cmps(struct CPUX86State *env, struct x86_decode *decode)
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}
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static void exec_stos_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_stos_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong addr;
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target_ulong val;
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@ -604,7 +604,7 @@ static void exec_stos_single(struct CPUX86State *env, struct x86_decode *decode)
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}
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static void exec_stos(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_stos(CPUX86State *env, struct x86_decode *decode)
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{
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if (decode->rep) {
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string_rep(env, decode, exec_stos_single, 0);
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@ -615,7 +615,7 @@ static void exec_stos(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_scas_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_scas_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong addr;
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@ -628,7 +628,7 @@ static void exec_scas_single(struct CPUX86State *env, struct x86_decode *decode)
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string_increment_reg(env, R_EDI, decode);
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}
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static void exec_scas(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_scas(CPUX86State *env, struct x86_decode *decode)
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{
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decode->op[0].type = X86_VAR_REG;
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decode->op[0].reg = R_EAX;
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@ -641,7 +641,7 @@ static void exec_scas(struct CPUX86State *env, struct x86_decode *decode)
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env->eip += decode->len;
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}
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static void exec_lods_single(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_lods_single(CPUX86State *env, struct x86_decode *decode)
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{
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target_ulong addr;
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target_ulong val = 0;
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@ -653,7 +653,7 @@ static void exec_lods_single(struct CPUX86State *env, struct x86_decode *decode)
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string_increment_reg(env, R_ESI, decode);
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}
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static void exec_lods(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_lods(CPUX86State *env, struct x86_decode *decode)
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{
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if (decode->rep) {
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string_rep(env, decode, exec_lods_single, 0);
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@ -760,7 +760,7 @@ void simulate_rdmsr(struct CPUState *cpu)
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RDX(env) = (uint32_t)(val >> 32);
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}
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static void exec_rdmsr(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode)
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{
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simulate_rdmsr(env_cpu(env));
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env->eip += decode->len;
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@ -855,7 +855,7 @@ void simulate_wrmsr(struct CPUState *cpu)
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printf("write msr %llx\n", RCX(cpu));*/
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}
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static void exec_wrmsr(struct CPUX86State *env, struct x86_decode *decode)
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static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode)
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{
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simulate_wrmsr(env_cpu(env));
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env->eip += decode->len;
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@ -865,7 +865,7 @@ static void exec_wrmsr(struct CPUX86State *env, struct x86_decode *decode)
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* flag:
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* 0 - bt, 1 - btc, 2 - bts, 3 - btr
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*/
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static void do_bt(struct CPUX86State *env, struct x86_decode *decode, int flag)
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static void do_bt(CPUX86State *env, struct x86_decode *decode, int flag)
|
||||
{
|
||||
int32_t displacement;
|
||||
uint8_t index;
|
||||
|
|
@ -911,31 +911,31 @@ static void do_bt(struct CPUX86State *env, struct x86_decode *decode, int flag)
|
|||
set_CF(env, cf);
|
||||
}
|
||||
|
||||
static void exec_bt(struct CPUX86State *env, struct x86_decode *decode)
|
||||
static void exec_bt(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
do_bt(env, decode, 0);
|
||||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
static void exec_btc(struct CPUX86State *env, struct x86_decode *decode)
|
||||
static void exec_btc(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
do_bt(env, decode, 1);
|
||||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
static void exec_btr(struct CPUX86State *env, struct x86_decode *decode)
|
||||
static void exec_btr(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
do_bt(env, decode, 3);
|
||||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
static void exec_bts(struct CPUX86State *env, struct x86_decode *decode)
|
||||
static void exec_bts(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
do_bt(env, decode, 2);
|
||||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
void exec_shl(struct CPUX86State *env, struct x86_decode *decode)
|
||||
void exec_shl(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
uint8_t count;
|
||||
int of = 0, cf = 0;
|
||||
|
|
@ -1022,7 +1022,7 @@ void exec_movsx(CPUX86State *env, struct x86_decode *decode)
|
|||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
void exec_ror(struct CPUX86State *env, struct x86_decode *decode)
|
||||
void exec_ror(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
uint8_t count;
|
||||
|
||||
|
|
@ -1100,7 +1100,7 @@ void exec_ror(struct CPUX86State *env, struct x86_decode *decode)
|
|||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
void exec_rol(struct CPUX86State *env, struct x86_decode *decode)
|
||||
void exec_rol(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
uint8_t count;
|
||||
|
||||
|
|
@ -1182,7 +1182,7 @@ void exec_rol(struct CPUX86State *env, struct x86_decode *decode)
|
|||
}
|
||||
|
||||
|
||||
void exec_rcl(struct CPUX86State *env, struct x86_decode *decode)
|
||||
void exec_rcl(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
uint8_t count;
|
||||
int of = 0, cf = 0;
|
||||
|
|
@ -1267,7 +1267,7 @@ void exec_rcl(struct CPUX86State *env, struct x86_decode *decode)
|
|||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
void exec_rcr(struct CPUX86State *env, struct x86_decode *decode)
|
||||
void exec_rcr(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
uint8_t count;
|
||||
int of = 0, cf = 0;
|
||||
|
|
@ -1342,7 +1342,7 @@ void exec_rcr(struct CPUX86State *env, struct x86_decode *decode)
|
|||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
static void exec_xchg(struct CPUX86State *env, struct x86_decode *decode)
|
||||
static void exec_xchg(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
fetch_operands(env, decode, 2, true, true, false);
|
||||
|
||||
|
|
@ -1354,7 +1354,7 @@ static void exec_xchg(struct CPUX86State *env, struct x86_decode *decode)
|
|||
env->eip += decode->len;
|
||||
}
|
||||
|
||||
static void exec_xadd(struct CPUX86State *env, struct x86_decode *decode)
|
||||
static void exec_xadd(CPUX86State *env, struct x86_decode *decode)
|
||||
{
|
||||
EXEC_2OP_FLAGS_CMD(env, decode, +, SET_FLAGS_OSZAPC_ADD, true);
|
||||
write_val_ext(env, decode->op[1].ptr, decode->op[0].val,
|
||||
|
|
@ -1365,7 +1365,7 @@ static void exec_xadd(struct CPUX86State *env, struct x86_decode *decode)
|
|||
|
||||
static struct cmd_handler {
|
||||
enum x86_decode_cmd cmd;
|
||||
void (*handler)(struct CPUX86State *env, struct x86_decode *ins);
|
||||
void (*handler)(CPUX86State *env, struct x86_decode *ins);
|
||||
} handlers[] = {
|
||||
{X86_DECODE_CMD_INVL, NULL,},
|
||||
{X86_DECODE_CMD_MOV, exec_mov},
|
||||
|
|
@ -1465,7 +1465,7 @@ void store_regs(struct CPUState *cpu)
|
|||
macvm_set_rip(cpu, env->eip);
|
||||
}
|
||||
|
||||
bool exec_instruction(struct CPUX86State *env, struct x86_decode *ins)
|
||||
bool exec_instruction(CPUX86State *env, struct x86_decode *ins)
|
||||
{
|
||||
/*if (hvf_vcpu_id(cpu))
|
||||
printf("%d, %llx: exec_instruction %s\n", hvf_vcpu_id(cpu), env->eip,
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#include "cpu.h"
|
||||
|
||||
void init_emu(void);
|
||||
bool exec_instruction(struct CPUX86State *env, struct x86_decode *ins);
|
||||
bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
|
||||
|
||||
void load_regs(struct CPUState *cpu);
|
||||
void store_regs(struct CPUState *cpu);
|
||||
|
|
@ -36,15 +36,15 @@ target_ulong read_reg(CPUX86State *env, int reg, int size);
|
|||
void write_reg(CPUX86State *env, int reg, target_ulong val, int size);
|
||||
target_ulong read_val_from_reg(target_ulong reg_ptr, int size);
|
||||
void write_val_to_reg(target_ulong reg_ptr, target_ulong val, int size);
|
||||
void write_val_ext(struct CPUX86State *env, target_ulong ptr, target_ulong val, int size);
|
||||
uint8_t *read_mmio(struct CPUX86State *env, target_ulong ptr, int bytes);
|
||||
target_ulong read_val_ext(struct CPUX86State *env, target_ulong ptr, int size);
|
||||
void write_val_ext(CPUX86State *env, target_ulong ptr, target_ulong val, int size);
|
||||
uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes);
|
||||
target_ulong read_val_ext(CPUX86State *env, target_ulong ptr, int size);
|
||||
|
||||
void exec_movzx(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_shl(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_movsx(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_ror(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_rol(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_rcl(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_rcr(struct CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_movzx(CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_shl(CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_movsx(CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_ror(CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_rol(CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_rcl(CPUX86State *env, struct x86_decode *decode);
|
||||
void exec_rcr(CPUX86State *env, struct x86_decode *decode);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ nvmm_set_segment(struct nvmm_x64_state_seg *nseg, const SegmentCache *qseg)
|
|||
static void
|
||||
nvmm_set_registers(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
struct nvmm_machine *mach = get_nvmm_mach();
|
||||
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
|
||||
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
|
||||
|
|
@ -222,7 +222,7 @@ nvmm_get_segment(SegmentCache *qseg, const struct nvmm_x64_state_seg *nseg)
|
|||
static void
|
||||
nvmm_get_registers(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
struct nvmm_machine *mach = get_nvmm_mach();
|
||||
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
|
||||
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
|
||||
|
|
@ -347,7 +347,7 @@ nvmm_get_registers(CPUState *cpu)
|
|||
static bool
|
||||
nvmm_can_take_int(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
|
||||
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
|
||||
struct nvmm_machine *mach = get_nvmm_mach();
|
||||
|
|
@ -394,7 +394,7 @@ nvmm_can_take_nmi(CPUState *cpu)
|
|||
static void
|
||||
nvmm_vcpu_pre_run(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
struct nvmm_machine *mach = get_nvmm_mach();
|
||||
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
|
||||
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
|
||||
|
|
@ -480,7 +480,7 @@ static void
|
|||
nvmm_vcpu_post_run(CPUState *cpu, struct nvmm_vcpu_exit *exit)
|
||||
{
|
||||
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
uint64_t tpr;
|
||||
|
||||
|
|
@ -652,7 +652,7 @@ static int
|
|||
nvmm_handle_halted(struct nvmm_machine *mach, CPUState *cpu,
|
||||
struct nvmm_vcpu_exit *exit)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
int ret = 0;
|
||||
|
||||
qemu_mutex_lock_iothread();
|
||||
|
|
@ -685,7 +685,7 @@ nvmm_inject_ud(struct nvmm_machine *mach, struct nvmm_vcpu *vcpu)
|
|||
static int
|
||||
nvmm_vcpu_loop(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
CPUX86State *env = (CPUArchState *)cpu->env_ptr;
|
||||
struct nvmm_machine *mach = get_nvmm_mach();
|
||||
struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
|
||||
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
|
||||
|
|
|
|||
|
|
@ -221,7 +221,7 @@ static SegmentCache whpx_seg_h2q(const WHV_X64_SEGMENT_REGISTER *hs)
|
|||
|
||||
static int whpx_set_tsc(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
WHV_REGISTER_NAME tsc_reg = WHvX64RegisterTsc;
|
||||
WHV_REGISTER_VALUE tsc_val;
|
||||
HRESULT hr;
|
||||
|
|
@ -260,7 +260,7 @@ static void whpx_set_registers(CPUState *cpu, int level)
|
|||
{
|
||||
struct whpx_state *whpx = &whpx_global;
|
||||
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
struct whpx_register_set vcxt;
|
||||
HRESULT hr;
|
||||
|
|
@ -428,7 +428,7 @@ static void whpx_set_registers(CPUState *cpu, int level)
|
|||
|
||||
static int whpx_get_tsc(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
WHV_REGISTER_NAME tsc_reg = WHvX64RegisterTsc;
|
||||
WHV_REGISTER_VALUE tsc_val;
|
||||
HRESULT hr;
|
||||
|
|
@ -449,7 +449,7 @@ static void whpx_get_registers(CPUState *cpu)
|
|||
{
|
||||
struct whpx_state *whpx = &whpx_global;
|
||||
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
struct whpx_register_set vcxt;
|
||||
uint64_t tpr, apic_base;
|
||||
|
|
@ -760,7 +760,7 @@ static int whpx_handle_portio(CPUState *cpu,
|
|||
|
||||
static int whpx_handle_halt(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
int ret = 0;
|
||||
|
||||
qemu_mutex_lock_iothread();
|
||||
|
|
@ -781,7 +781,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu)
|
|||
HRESULT hr;
|
||||
struct whpx_state *whpx = &whpx_global;
|
||||
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
int irq;
|
||||
uint8_t tpr;
|
||||
|
|
@ -903,7 +903,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu)
|
|||
static void whpx_vcpu_post_run(CPUState *cpu)
|
||||
{
|
||||
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
|
||||
env->eflags = vcpu->exit_ctx.VpContext.Rflags;
|
||||
|
|
@ -927,7 +927,7 @@ static void whpx_vcpu_post_run(CPUState *cpu)
|
|||
|
||||
static void whpx_vcpu_process_async_events(CPUState *cpu)
|
||||
{
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
struct whpx_vcpu *vcpu = get_whpx_vcpu(cpu);
|
||||
|
||||
|
|
@ -1333,7 +1333,7 @@ int whpx_init_vcpu(CPUState *cpu)
|
|||
struct whpx_state *whpx = &whpx_global;
|
||||
struct whpx_vcpu *vcpu = NULL;
|
||||
Error *local_error = NULL;
|
||||
struct CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
CPUX86State *env = (CPUArchState *)(cpu->env_ptr);
|
||||
X86CPU *x86_cpu = X86_CPU(cpu);
|
||||
UINT64 freq = 0;
|
||||
int ret;
|
||||
|
|
|
|||
|
|
@ -134,14 +134,14 @@ struct r4k_tlb_t {
|
|||
struct CPUMIPSTLBContext {
|
||||
uint32_t nb_tlb;
|
||||
uint32_t tlb_in_use;
|
||||
int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot,
|
||||
int (*map_address)(CPUMIPSState *env, hwaddr *physical, int *prot,
|
||||
target_ulong address, MMUAccessType access_type);
|
||||
void (*helper_tlbwi)(struct CPUMIPSState *env);
|
||||
void (*helper_tlbwr)(struct CPUMIPSState *env);
|
||||
void (*helper_tlbp)(struct CPUMIPSState *env);
|
||||
void (*helper_tlbr)(struct CPUMIPSState *env);
|
||||
void (*helper_tlbinv)(struct CPUMIPSState *env);
|
||||
void (*helper_tlbinvf)(struct CPUMIPSState *env);
|
||||
void (*helper_tlbwi)(CPUMIPSState *env);
|
||||
void (*helper_tlbwr)(CPUMIPSState *env);
|
||||
void (*helper_tlbp)(CPUMIPSState *env);
|
||||
void (*helper_tlbr)(CPUMIPSState *env);
|
||||
void (*helper_tlbinv)(CPUMIPSState *env);
|
||||
void (*helper_tlbinvf)(CPUMIPSState *env);
|
||||
union {
|
||||
struct {
|
||||
r4k_tlb_t tlb[MIPS_TLB_MAX];
|
||||
|
|
|
|||
|
|
@ -231,11 +231,11 @@ typedef struct CPUOpenRISCTLBContext {
|
|||
OpenRISCTLBEntry itlb[TLB_SIZE];
|
||||
OpenRISCTLBEntry dtlb[TLB_SIZE];
|
||||
|
||||
int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu,
|
||||
int (*cpu_openrisc_map_address_code)(OpenRISCCPU *cpu,
|
||||
hwaddr *physical,
|
||||
int *prot,
|
||||
target_ulong address, int rw);
|
||||
int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu,
|
||||
int (*cpu_openrisc_map_address_data)(OpenRISCCPU *cpu,
|
||||
hwaddr *physical,
|
||||
int *prot,
|
||||
target_ulong address, int rw);
|
||||
|
|
|
|||
|
|
@ -344,7 +344,7 @@ typedef struct XtensaGdbRegmap {
|
|||
} XtensaGdbRegmap;
|
||||
|
||||
typedef struct XtensaCcompareTimer {
|
||||
struct CPUXtensaState *env;
|
||||
CPUXtensaState *env;
|
||||
QEMUTimer *timer;
|
||||
} XtensaCcompareTimer;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue