target/i386: Add ZMM_OFFSET macro
Add a convenience macro to get the address of an xmm_regs element within CPUX86State. This was originally going to be the basis of an implementation that broke operations into 128 bit chunks. I scrapped that idea, so this is now a purely cosmetic change. But I think a worthwhile one - it reduces the number of function calls that need to be split over multiple lines. No functional changes. Signed-off-by: Paul Brook <paul@nowt.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220424220204.2493824-9-paul@nowt.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paul Brook
Paolo Bonzini
parent
da1a7edb5d
commit
36fc7ee299
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@ -2777,6 +2777,8 @@ static inline void gen_op_movq_env_0(DisasContext *s, int d_offset)
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tcg_gen_st_i64(s->tmp1_i64, cpu_env, d_offset);
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}
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#define ZMM_OFFSET(reg) offsetof(CPUX86State, xmm_regs[reg])
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typedef void (*SSEFunc_i_ep)(TCGv_i32 val, TCGv_ptr env, TCGv_ptr reg);
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typedef void (*SSEFunc_l_ep)(TCGv_i64 val, TCGv_ptr env, TCGv_ptr reg);
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typedef void (*SSEFunc_0_epi)(TCGv_ptr env, TCGv_ptr reg, TCGv_i32 val);
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@ -3198,13 +3200,13 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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if (mod == 3)
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goto illegal_op;
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gen_lea_modrm(env, s, modrm);
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gen_sto_env_A0(s, offsetof(CPUX86State, xmm_regs[reg]));
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gen_sto_env_A0(s, ZMM_OFFSET(reg));
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break;
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case 0x3f0: /* lddqu */
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if (mod == 3)
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goto illegal_op;
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gen_lea_modrm(env, s, modrm);
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gen_ldo_env_A0(s, offsetof(CPUX86State, xmm_regs[reg]));
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gen_ldo_env_A0(s, ZMM_OFFSET(reg));
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break;
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case 0x22b: /* movntss */
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case 0x32b: /* movntsd */
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@ -3240,15 +3242,13 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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#ifdef TARGET_X86_64
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if (s->dflag == MO_64) {
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gen_ldst_modrm(env, s, modrm, MO_64, OR_TMP0, 0);
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tcg_gen_addi_ptr(s->ptr0, cpu_env,
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offsetof(CPUX86State,xmm_regs[reg]));
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tcg_gen_addi_ptr(s->ptr0, cpu_env, ZMM_OFFSET(reg));
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gen_helper_movq_mm_T0_xmm(s->ptr0, s->T0);
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} else
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#endif
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{
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gen_ldst_modrm(env, s, modrm, MO_32, OR_TMP0, 0);
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tcg_gen_addi_ptr(s->ptr0, cpu_env,
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offsetof(CPUX86State,xmm_regs[reg]));
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tcg_gen_addi_ptr(s->ptr0, cpu_env, ZMM_OFFSET(reg));
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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gen_helper_movl_mm_T0_xmm(s->ptr0, s->tmp2_i32);
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}
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@ -3273,11 +3273,10 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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case 0x26f: /* movdqu xmm, ea */
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if (mod != 3) {
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gen_lea_modrm(env, s, modrm);
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gen_ldo_env_A0(s, offsetof(CPUX86State, xmm_regs[reg]));
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gen_ldo_env_A0(s, ZMM_OFFSET(reg));
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} else {
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rm = (modrm & 7) | REX_B(s);
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gen_op_movo(s, offsetof(CPUX86State, xmm_regs[reg]),
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offsetof(CPUX86State,xmm_regs[rm]));
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gen_op_movo(s, ZMM_OFFSET(reg), ZMM_OFFSET(rm));
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}
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break;
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case 0x210: /* movss xmm, ea */
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@ -3333,7 +3332,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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case 0x212: /* movsldup */
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if (mod != 3) {
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gen_lea_modrm(env, s, modrm);
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gen_ldo_env_A0(s, offsetof(CPUX86State, xmm_regs[reg]));
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gen_ldo_env_A0(s, ZMM_OFFSET(reg));
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} else {
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rm = (modrm & 7) | REX_B(s);
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gen_op_movl(s, offsetof(CPUX86State, xmm_regs[reg].ZMM_L(0)),
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@ -3375,7 +3374,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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case 0x216: /* movshdup */
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if (mod != 3) {
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gen_lea_modrm(env, s, modrm);
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gen_ldo_env_A0(s, offsetof(CPUX86State, xmm_regs[reg]));
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gen_ldo_env_A0(s, ZMM_OFFSET(reg));
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} else {
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rm = (modrm & 7) | REX_B(s);
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gen_op_movl(s, offsetof(CPUX86State, xmm_regs[reg].ZMM_L(1)),
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@ -3397,8 +3396,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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goto illegal_op;
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field_length = x86_ldub_code(env, s) & 0x3F;
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bit_index = x86_ldub_code(env, s) & 0x3F;
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tcg_gen_addi_ptr(s->ptr0, cpu_env,
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offsetof(CPUX86State,xmm_regs[reg]));
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tcg_gen_addi_ptr(s->ptr0, cpu_env, ZMM_OFFSET(reg));
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if (b1 == 1)
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gen_helper_extrq_i(cpu_env, s->ptr0,
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tcg_const_i32(bit_index),
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@ -3467,11 +3465,10 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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case 0x27f: /* movdqu ea, xmm */
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if (mod != 3) {
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gen_lea_modrm(env, s, modrm);
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gen_sto_env_A0(s, offsetof(CPUX86State, xmm_regs[reg]));
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gen_sto_env_A0(s, ZMM_OFFSET(reg));
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} else {
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rm = (modrm & 7) | REX_B(s);
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gen_op_movo(s, offsetof(CPUX86State, xmm_regs[rm]),
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offsetof(CPUX86State,xmm_regs[reg]));
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gen_op_movo(s, ZMM_OFFSET(rm), ZMM_OFFSET(reg));
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}
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break;
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case 0x211: /* movss ea, xmm */
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@ -3549,7 +3546,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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}
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if (is_xmm) {
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rm = (modrm & 7) | REX_B(s);
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op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
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op2_offset = ZMM_OFFSET(rm);
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} else {
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rm = (modrm & 7);
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op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
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@ -3560,15 +3557,13 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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break;
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case 0x050: /* movmskps */
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rm = (modrm & 7) | REX_B(s);
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tcg_gen_addi_ptr(s->ptr0, cpu_env,
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offsetof(CPUX86State,xmm_regs[rm]));
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tcg_gen_addi_ptr(s->ptr0, cpu_env, ZMM_OFFSET(rm));
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gen_helper_movmskps(s->tmp2_i32, cpu_env, s->ptr0);
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tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp2_i32);
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break;
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case 0x150: /* movmskpd */
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rm = (modrm & 7) | REX_B(s);
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tcg_gen_addi_ptr(s->ptr0, cpu_env,
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offsetof(CPUX86State,xmm_regs[rm]));
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tcg_gen_addi_ptr(s->ptr0, cpu_env, ZMM_OFFSET(rm));
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gen_helper_movmskpd(s->tmp2_i32, cpu_env, s->ptr0);
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tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp2_i32);
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break;
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@ -3583,7 +3578,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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rm = (modrm & 7);
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op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
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}
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op1_offset = offsetof(CPUX86State,xmm_regs[reg]);
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op1_offset = ZMM_OFFSET(reg);
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tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
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tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
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switch(b >> 8) {
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@ -3600,7 +3595,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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case 0x32a: /* cvtsi2sd */
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ot = mo_64_32(s->dflag);
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gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
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op1_offset = offsetof(CPUX86State,xmm_regs[reg]);
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op1_offset = ZMM_OFFSET(reg);
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tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
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if (ot == MO_32) {
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SSEFunc_0_epi sse_fn_epi = sse_op_table3ai[(b >> 8) & 1];
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@ -3626,7 +3621,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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gen_ldo_env_A0(s, op2_offset);
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} else {
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rm = (modrm & 7) | REX_B(s);
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op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
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op2_offset = ZMM_OFFSET(rm);
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}
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op1_offset = offsetof(CPUX86State,fpregs[reg & 7].mmx);
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tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
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@ -3663,7 +3658,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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op2_offset = offsetof(CPUX86State,xmm_t0);
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} else {
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rm = (modrm & 7) | REX_B(s);
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op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
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op2_offset = ZMM_OFFSET(rm);
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}
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tcg_gen_addi_ptr(s->ptr0, cpu_env, op2_offset);
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if (ot == MO_32) {
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@ -3749,8 +3744,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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goto illegal_op;
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if (b1) {
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rm = (modrm & 7) | REX_B(s);
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tcg_gen_addi_ptr(s->ptr0, cpu_env,
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offsetof(CPUX86State, xmm_regs[rm]));
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tcg_gen_addi_ptr(s->ptr0, cpu_env, ZMM_OFFSET(rm));
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gen_helper_pmovmskb_xmm(s->tmp2_i32, cpu_env, s->ptr0);
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} else {
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rm = (modrm & 7);
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@ -3782,9 +3776,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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goto illegal_op;
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if (b1) {
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op1_offset = offsetof(CPUX86State,xmm_regs[reg]);
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op1_offset = ZMM_OFFSET(reg);
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if (mod == 3) {
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op2_offset = offsetof(CPUX86State,xmm_regs[rm | REX_B(s)]);
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op2_offset = ZMM_OFFSET(rm | REX_B(s));
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} else {
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op2_offset = offsetof(CPUX86State,xmm_t0);
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gen_lea_modrm(env, s, modrm);
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@ -4347,9 +4341,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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}
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if (b1) {
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op1_offset = offsetof(CPUX86State,xmm_regs[reg]);
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op1_offset = ZMM_OFFSET(reg);
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if (mod == 3) {
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op2_offset = offsetof(CPUX86State,xmm_regs[rm | REX_B(s)]);
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op2_offset = ZMM_OFFSET(rm | REX_B(s));
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} else {
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op2_offset = offsetof(CPUX86State,xmm_t0);
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gen_lea_modrm(env, s, modrm);
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@ -4429,7 +4423,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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break;
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}
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if (is_xmm) {
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op1_offset = offsetof(CPUX86State,xmm_regs[reg]);
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op1_offset = ZMM_OFFSET(reg);
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if (mod != 3) {
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int sz = 4;
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@ -4476,7 +4470,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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}
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} else {
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rm = (modrm & 7) | REX_B(s);
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op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
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op2_offset = ZMM_OFFSET(rm);
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}
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} else {
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op1_offset = offsetof(CPUX86State,fpregs[reg].mmx);
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