ahci: Add allwinner AHCI
Add a Sysbus AHCI subclass for the Allwinner AHCI. It has a few extra vendor specific registers which are used for phy and power init. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 833b5b05ed5ade38bf69656679b0a7575e79492b.1445917756.git.crosthwaite.peter@gmail.com [resolved patch context on pull --js] Signed-off-by: John Snow <jsnow@redhat.com>
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@ -1690,9 +1690,104 @@ static const TypeInfo sysbus_ahci_info = {
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.class_init = sysbus_ahci_class_init,
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.class_init = sysbus_ahci_class_init,
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};
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};
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#define ALLWINNER_AHCI_BISTAFR ((0xa0 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_BISTCR ((0xa4 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_BISTFCTR ((0xa8 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_BISTSR ((0xac - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_BISTDECR ((0xb0 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_DIAGNR0 ((0xb4 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_DIAGNR1 ((0xb8 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_OOBR ((0xbc - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_PHYCS0R ((0xc0 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_PHYCS1R ((0xc4 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_PHYCS2R ((0xc8 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_TIMER1MS ((0xe0 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_GPARAM1R ((0xe8 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_GPARAM2R ((0xec - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_PPARAMR ((0xf0 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_TESTR ((0xf4 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_VERSIONR ((0xf8 - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_IDR ((0xfc - ALLWINNER_AHCI_MMIO_OFF) / 4)
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#define ALLWINNER_AHCI_RWCR ((0xfc - ALLWINNER_AHCI_MMIO_OFF) / 4)
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static uint64_t allwinner_ahci_mem_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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AllwinnerAHCIState *a = opaque;
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uint64_t val = a->regs[addr/4];
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switch (addr / 4) {
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case ALLWINNER_AHCI_PHYCS0R:
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val |= 0x2 << 28;
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break;
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case ALLWINNER_AHCI_PHYCS2R:
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val &= ~(0x1 << 24);
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break;
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}
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DPRINTF(-1, "addr=0x%" HWADDR_PRIx " val=0x%" PRIx64 ", size=%d\n",
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addr, val, size);
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return val;
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}
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static void allwinner_ahci_mem_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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AllwinnerAHCIState *a = opaque;
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DPRINTF(-1, "addr=0x%" HWADDR_PRIx " val=0x%" PRIx64 ", size=%d\n",
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addr, val, size);
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a->regs[addr/4] = val;
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}
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static const MemoryRegionOps allwinner_ahci_mem_ops = {
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.read = allwinner_ahci_mem_read,
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.write = allwinner_ahci_mem_write,
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.valid.min_access_size = 4,
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.valid.max_access_size = 4,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void allwinner_ahci_init(Object *obj)
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{
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SysbusAHCIState *s = SYSBUS_AHCI(obj);
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AllwinnerAHCIState *a = ALLWINNER_AHCI(obj);
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memory_region_init_io(&a->mmio, OBJECT(obj), &allwinner_ahci_mem_ops, a,
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"allwinner-ahci", ALLWINNER_AHCI_MMIO_SIZE);
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memory_region_add_subregion(&s->ahci.mem, ALLWINNER_AHCI_MMIO_OFF,
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&a->mmio);
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}
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static const VMStateDescription vmstate_allwinner_ahci = {
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.name = "allwinner-ahci",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(regs, AllwinnerAHCIState,
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ALLWINNER_AHCI_MMIO_SIZE/4),
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VMSTATE_END_OF_LIST()
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}
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};
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static void allwinner_ahci_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->vmsd = &vmstate_allwinner_ahci;
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}
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static const TypeInfo allwinner_ahci_info = {
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.name = TYPE_ALLWINNER_AHCI,
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.parent = TYPE_SYSBUS_AHCI,
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.instance_size = sizeof(AllwinnerAHCIState),
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.instance_init = allwinner_ahci_init,
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.class_init = allwinner_ahci_class_init,
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};
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static void sysbus_ahci_register_types(void)
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static void sysbus_ahci_register_types(void)
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{
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{
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type_register_static(&sysbus_ahci_info);
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type_register_static(&sysbus_ahci_info);
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type_register_static(&allwinner_ahci_info);
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}
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}
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type_init(sysbus_ahci_register_types)
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type_init(sysbus_ahci_register_types)
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@ -386,4 +386,20 @@ typedef struct SysbusAHCIState {
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uint32_t num_ports;
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uint32_t num_ports;
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} SysbusAHCIState;
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} SysbusAHCIState;
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#define TYPE_ALLWINNER_AHCI "allwinner-ahci"
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#define ALLWINNER_AHCI(obj) OBJECT_CHECK(AllwinnerAHCIState, (obj), \
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TYPE_ALLWINNER_AHCI)
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#define ALLWINNER_AHCI_MMIO_OFF 0x80
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#define ALLWINNER_AHCI_MMIO_SIZE 0x80
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struct AllwinnerAHCIState {
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/*< private >*/
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SysbusAHCIState parent_obj;
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/*< public >*/
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MemoryRegion mmio;
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uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4];
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};
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#endif /* HW_IDE_AHCI_H */
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#endif /* HW_IDE_AHCI_H */
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@ -9,6 +9,7 @@ struct Monitor;
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typedef struct AdapterInfo AdapterInfo;
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typedef struct AdapterInfo AdapterInfo;
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typedef struct AddressSpace AddressSpace;
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typedef struct AddressSpace AddressSpace;
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typedef struct AioContext AioContext;
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typedef struct AioContext AioContext;
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typedef struct AllwinnerAHCIState AllwinnerAHCIState;
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typedef struct AudioState AudioState;
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typedef struct AudioState AudioState;
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typedef struct BlockBackend BlockBackend;
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typedef struct BlockBackend BlockBackend;
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typedef struct BlockBackendRootState BlockBackendRootState;
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typedef struct BlockBackendRootState BlockBackendRootState;
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