Convert logical operations and umul/smul

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-05-10 10:38:34 +03:00
parent 789c91ef39
commit 38482a77f0
2 changed files with 43 additions and 24 deletions

View File

@ -902,6 +902,23 @@ static uint32_t compute_C_addx_xcc(void)
}
#endif
static uint32_t compute_all_logic(void)
{
return get_NZ_icc(CC_DST);
}
static uint32_t compute_C_logic(void)
{
return 0;
}
#ifdef TARGET_SPARC64
static uint32_t compute_all_logic_xcc(void)
{
return get_NZ_xcc(CC_DST);
}
#endif
typedef struct CCTable {
uint32_t (*compute_all)(void); /* return all the flags */
uint32_t (*compute_c)(void); /* return the C flag */
@ -912,6 +929,7 @@ static const CCTable icc_table[CC_OP_NB] = {
[CC_OP_FLAGS] = { compute_all_flags, compute_C_flags },
[CC_OP_ADD] = { compute_all_add, compute_C_add },
[CC_OP_ADDX] = { compute_all_addx, compute_C_addx },
[CC_OP_LOGIC] = { compute_all_logic, compute_C_logic },
};
#ifdef TARGET_SPARC64
@ -920,6 +938,7 @@ static const CCTable xcc_table[CC_OP_NB] = {
[CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc },
[CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc },
[CC_OP_ADDX] = { compute_all_addx_xcc, compute_C_addx_xcc },
[CC_OP_LOGIC] = { compute_all_logic_xcc, compute_C_logic },
};
#endif

View File

@ -3136,9 +3136,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_and_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x2: /* or */
@ -3149,9 +3149,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_or_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x3: /* xor */
@ -3162,9 +3162,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x4: /* sub */
@ -3195,9 +3195,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_andc_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x6: /* orn */
@ -3208,9 +3208,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_orc_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x7: /* xorn */
@ -3222,9 +3222,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_tmp0);
}
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x8: /* addx, V9 addc */
@ -3269,18 +3269,18 @@ static void disas_sparc_insn(DisasContext * dc)
CHECK_IU_FEATURE(dc, MUL);
gen_op_umul(cpu_dst, cpu_src1, cpu_src2);
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0xb: /* smul */
CHECK_IU_FEATURE(dc, MUL);
gen_op_smul(cpu_dst, cpu_src1, cpu_src2);
if (xop & 0x10) {
gen_op_logic_cc(cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
dc->cc_op = CC_OP_LOGIC;
}
break;
case 0xc: /* subx, V9 subc */