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rx: Rename QOM type check macros

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Currently we have a RXCPU typedef and a RXCPU type checking
macro, but OBJECT_DECLARE* would transform the RXCPU macro into a
function, and the function name would conflict with the typedef
name.

Rename the RXCPU* QOM type check macros to RX_CPU*, so we will
avoid the conflict and make the macro names consistent with the
TYPE_RX_CPU constant name.

This will make future conversion to OBJECT_DECLARE* easier.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20200825192110.3528606-53-ehabkost@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Eduardo Habkost 2020-08-25 15:20:48 -04:00
parent 37e3d65043
commit 38688fdbe9
6 changed files with 17 additions and 17 deletions
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4
hw/rx/rx-gdbsim.c
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@ -118,7 +118,7 @@ static void rx_gdbsim_init(MachineState *machine)
* the latter half of the SDRAM space.
*/
kernel_offset = machine->ram_size / 2;
rx_load_image(RXCPU(first_cpu), kernel_filename,
rx_load_image(RX_CPU(first_cpu), kernel_filename,
SDRAM_BASE + kernel_offset, kernel_offset);
if (dtb_filename) {
ram_addr_t dtb_offset;
@ -141,7 +141,7 @@ static void rx_gdbsim_init(MachineState *machine)
rom_add_blob_fixed("dtb", dtb, dtb_size,
SDRAM_BASE + dtb_offset);
/* Set dtb address to R1 */
RXCPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
}
}
}

6
target/rx/cpu-qom.h
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@ -25,11 +25,11 @@
#define TYPE_RX62N_CPU RX_CPU_TYPE_NAME("rx62n")
#define RXCPU_CLASS(klass) \
#define RX_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RX_CPU)
#define RXCPU(obj) \
#define RX_CPU(obj) \
OBJECT_CHECK(RXCPU, (obj), TYPE_RX_CPU)
#define RXCPU_GET_CLASS(obj) \
#define RX_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(RXCPUClass, (obj), TYPE_RX_CPU)
/*

14
target/rx/cpu.c
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@ -28,14 +28,14 @@
static void rx_cpu_set_pc(CPUState *cs, vaddr value)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
cpu->env.pc = value;
}
static void rx_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
cpu->env.pc = tb->pc;
}
@ -48,8 +48,8 @@ static bool rx_cpu_has_work(CPUState *cs)
static void rx_cpu_reset(DeviceState *dev)
{
RXCPU *cpu = RXCPU(dev);
RXCPUClass *rcc = RXCPU_GET_CLASS(cpu);
RXCPU *cpu = RX_CPU(dev);
RXCPUClass *rcc = RX_CPU_GET_CLASS(cpu);
CPURXState *env = &cpu->env;
uint32_t *resetvec;
@ -108,7 +108,7 @@ static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
static void rx_cpu_realize(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
RXCPUClass *rcc = RXCPU_GET_CLASS(dev);
RXCPUClass *rcc = RX_CPU_GET_CLASS(dev);
Error *local_err = NULL;
cpu_exec_realizefn(cs, &local_err);
@ -164,7 +164,7 @@ static bool rx_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
static void rx_cpu_init(Object *obj)
{
CPUState *cs = CPU(obj);
RXCPU *cpu = RXCPU(obj);
RXCPU *cpu = RX_CPU(obj);
CPURXState *env = &cpu->env;
cpu_set_cpustate_pointers(cpu);
@ -176,7 +176,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
CPUClass *cc = CPU_CLASS(klass);
RXCPUClass *rcc = RXCPU_CLASS(klass);
RXCPUClass *rcc = RX_CPU_CLASS(klass);
device_class_set_parent_realize(dc, rx_cpu_realize,
&rcc->parent_realize);

4
target/rx/gdbstub.c
View File

@ -22,7 +22,7 @@
int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
CPURXState *env = &cpu->env;
switch (n) {
@ -54,7 +54,7 @@ int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
int rx_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
CPURXState *env = &cpu->env;
uint32_t psw;
switch (n) {

4
target/rx/helper.c
View File

@ -44,7 +44,7 @@ void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte)
#define INT_FLAGS (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR)
void rx_cpu_do_interrupt(CPUState *cs)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
CPURXState *env = &cpu->env;
int do_irq = cs->interrupt_request & INT_FLAGS;
uint32_t save_psw;
@ -121,7 +121,7 @@ void rx_cpu_do_interrupt(CPUState *cs)
bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
CPURXState *env = &cpu->env;
int accept = 0;
/* hardware interrupt (Normal) */

2
target/rx/translate.c
View File

@ -128,7 +128,7 @@ static int bdsp_s(DisasContext *ctx, int d)
void rx_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
RXCPU *cpu = RXCPU(cs);
RXCPU *cpu = RX_CPU(cs);
CPURXState *env = &cpu->env;
int i;
uint32_t psw;