target/arm: Use tcg_constant for TT, SAT, SMMLA
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220426163043.100432-32-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -6596,8 +6596,8 @@ static bool trans_TT(DisasContext *s, arg_TT *a)
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}
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}
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addr = load_reg(s, a->rn);
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addr = load_reg(s, a->rn);
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tmp = tcg_const_i32((a->A << 1) | a->T);
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tmp = tcg_temp_new_i32();
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gen_helper_v7m_tt(tmp, cpu_env, addr, tmp);
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gen_helper_v7m_tt(tmp, cpu_env, addr, tcg_constant_i32((a->A << 1) | a->T));
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tcg_temp_free_i32(addr);
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tcg_temp_free_i32(addr);
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store_reg(s, a->rd, tmp);
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store_reg(s, a->rd, tmp);
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return true;
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return true;
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@ -7564,7 +7564,7 @@ static bool trans_PKH(DisasContext *s, arg_PKH *a)
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static bool op_sat(DisasContext *s, arg_sat *a,
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static bool op_sat(DisasContext *s, arg_sat *a,
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void (*gen)(TCGv_i32, TCGv_env, TCGv_i32, TCGv_i32))
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void (*gen)(TCGv_i32, TCGv_env, TCGv_i32, TCGv_i32))
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{
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{
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TCGv_i32 tmp, satimm;
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TCGv_i32 tmp;
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int shift = a->imm;
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int shift = a->imm;
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if (!ENABLE_ARCH_6) {
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if (!ENABLE_ARCH_6) {
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@ -7578,9 +7578,7 @@ static bool op_sat(DisasContext *s, arg_sat *a,
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tcg_gen_shli_i32(tmp, tmp, shift);
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tcg_gen_shli_i32(tmp, tmp, shift);
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}
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}
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satimm = tcg_const_i32(a->satimm);
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gen(tmp, cpu_env, tmp, tcg_constant_i32(a->satimm));
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gen(tmp, cpu_env, tmp, satimm);
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tcg_temp_free_i32(satimm);
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store_reg(s, a->rd, tmp);
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store_reg(s, a->rd, tmp);
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return true;
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return true;
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@ -7915,9 +7913,7 @@ static bool op_smmla(DisasContext *s, arg_rrrr *a, bool round, bool sub)
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* a non-zero multiplicand lowpart, and the correct result
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* a non-zero multiplicand lowpart, and the correct result
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* lowpart for rounding.
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* lowpart for rounding.
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*/
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*/
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TCGv_i32 zero = tcg_const_i32(0);
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tcg_gen_sub2_i32(t2, t1, tcg_constant_i32(0), t3, t2, t1);
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tcg_gen_sub2_i32(t2, t1, zero, t3, t2, t1);
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tcg_temp_free_i32(zero);
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} else {
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} else {
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tcg_gen_add_i32(t1, t1, t3);
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tcg_gen_add_i32(t1, t1, t3);
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}
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}
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